Flash memory apparatus and erasing method thereof

A flash memory apparatus, comprising:

• a memory array, having a plurality of memory blocks, each of the memory blocks being divided into a plurality of memory cell groups;
• a flag register, configured to store a first erase flag and a second erase flag corresponding to each of the memory cell groups;
• and
• a control circuit, coupled to the memory array and the flag register, and configured to perform an erase operation on a target memory block among the memory blocks,
• wherein, the control circuit applies an erase voltage to the target memory block, and performs a first erase verification on the target memory block using a first erase verification voltage,
• the control circuit performs a second erase verification on the target memory block in a case that the memory cell group failing the first erase verification is in the target memory block using a second erase verification voltage higher than the first erase verification voltage, and sets the first erase flag and the second erase flag corresponding to each of the memory cell groups in the target memory block according to verification results of the first erase verification and the second erase verification to classify each of the memory cell groups and accordingly adjust increase amount of the erase voltage.