Circuit structure adapted to switch between inverse square root operation and reciprocal operation
AssigneeNational Yang Ming Chiao Tung University
InventorsJuinn-Dar HUANG, Jye-En WU, Ting-Wei HU
Life of this patent
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Abstract
A circuit structure is adapted to switch between inverse square root (ISR) operation and reciprocal operation, and includes a multiplexer module to selectively provide ISR operation constant(s) or reciprocal operation constant(s), and an operation circuit configured to selectively use the ISR operation constant(s) to perform ISR operation or use the reciprocal operation constant(s) to perform reciprocal operation on a positive integer. The operation circuit includes at least one arithmetic unit that is used in both of the ISR operation and the reciprocal operation.
Claims7
A circuit structure adapted to switch between inverse square root (ISR) operation and reciprocal operation, comprising:
- a register module storing at least one ISR operation constant and at least one reciprocal operation constant;
- a multiplexer module electrically connected to said register module to receive the at least one ISR operation constant and the at least one reciprocal operation constant, disposed to receive a mode select signal that indicates one of the ISR operation and the reciprocal operation, and configured to deliver a multiplexer constant output, wherein the multiplexer constant output is the at least one ISR operation constant in response to the mode select signal indicating the ISR operation, and is the at least one reciprocal operation constant in response to the mode select signal indicating the reciprocal operation;
- and
- an operation circuit disposed to receive a positive integer and the mode select signal, and electrically connected to said multiplexer module for receiving the multiplexer constant output;
- wherein the operation circuit is configured to, in response to the mode select signal indicating the ISR operation, perform a first set of elementary arithmetic operations on the positive integer using the multiplexer constant output that is the at least one ISR operation constant, thereby obtaining an estimated value of an inverse square root of the positive integer;
- wherein said operation circuit is configured to, in response to the mode select signal indicating the reciprocal operation, perform a second set of elementary arithmetic operations on the positive integer using the multiplexer constant output that is the at least one reciprocal operation constant, thereby outputting an estimated value of a reciprocal of the positive integer;
- and
- wherein the operation circuit includes at least one arithmetic unit that is used in both of the first set of elementary arithmetic operations and the second set of elementary arithmetic operations.
Dependencies are inferred from the claim text.