Chip, chip manufacturing method, computing device, and signal transmission method
AssigneeHuawei Technologies Co., Ltd.
InventorsYahan Xu, Xiping Peng, Junhao Fu
Life of this patent
Estimating the term…
Abstract
A chip is provided. A package substrate of the chip includes a basic pattern with six signal pins. A first pin, a second pin, a third pin, and a fourth pin in the six signal pins are sequentially spaced apart in a first direction, and a fifth pin and a sixth pin are spaced apart in a second direction. The fifth pin and the sixth pin are respectively located on two sides of a connection line between the second pin and the third pin. The first pin, the fourth pin, the fifth pin, and the sixth pin are data signal pins, and the second pin and the third pin are control signal pins.
Claims20
A chip, comprising:
- a package substrate;
- and
- a die, disposed on the package substrate, wherein a plurality of pinmap patterns are disposed in a pin region of the package substrate;
- wherein the plurality of pinmap patterns comprises at least two pinmap patterns, wherein the at least two pinmap patterns are each a basic pattern, each pinmap pattern comprises six signal pins, and wherein the six signal pins comprises a first pin, a second pin, a third pin, and a fourth pin are sequentially spaced apart in a first direction;
- wherein the six signal pins further comprises a fifth pin and a sixth pin that are spaced apart in a second direction, and the fifth pin and the sixth pin are respectively located on two sides of a connection line between the second pin and the third pin, the first direction is different from the second direction;
- wherein the first pin, the fourth pin, the fifth pin, and the sixth pin are data signal pins, the second pin and the third pin are control signal pins.
An electronic device, comprising a housing and a circuit board disposed in the housing, wherein a chip is disposed on the circuit board, a signal pin of the chip is electrically connected to the circuit board, and wherein the chip comprises:
- a package substrate;
- and
- a die, disposed on the package substrate, wherein a plurality of pinmap patterns are disposed in a pin region of the package substrate;
- wherein the plurality of pinmap patterns comprises at least two pinmap patterns, wherein the at least two pinmap patterns are basic patterns, each pinmap pattern of the at least two pinmap patterns comprises six signal pins, and wherein the six signal pins comprises a first pin, a second pin, a third pin, and a fourth pin that are sequentially spaced apart in a first direction;
- wherein the six signal pins further comprises a fifth pin and a sixth pin that are spaced apart in a second direction, and the fifth pin and the sixth pin are respectively located on two sides of a connection line between the second pin and the third pin, the first direction is different from the second direction;
- wherein the first pin, the fourth pin, the fifth pin, and the sixth pin are data signal pins, the second pin and the third pin are control signal pins.
A chip manufacturing method comprising:
- disposing a die on a package substrate to form the chip, wherein a plurality of pinmap patterns are disposed in a pin region of the package substrate;
- wherein the plurality of pinmap patterns comprises at least two pinmap patterns, wherein the at least two pinmap patterns are basic patterns, each pinmap pattern comprises six signal pins, and wherein the six signal pins comprises a first pin, a second pin, a third pin, and a fourth pin that are sequentially spaced apart in a first direction;
- wherein the six signal pins further comprises a fifth pin and a sixth pin that are spaced apart in a second direction, and the fifth pin and the sixth pin are respectively located on two sides of a connection line between the second pin and the third pin, the first direction is different from the second direction;
- wherein the first pin, the fourth pin, the fifth pin, and the sixth pin are data signal pins, the second pin and the third pin are control signal pins.
Dependencies are inferred from the claim text.