Hybrid decoupling capacitor and method forming same
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsHao-Chieh Chan, Chung-Hui Chen
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Abstract
A device includes a first capacitor and a second capacitor connected to the first capacitor in parallel. The first capacitor includes a semiconductor region and a first plurality of gate stacks. The first plurality of gate stacks comprise a plurality of gate dielectrics over and contacting the semiconductor region, and a plurality of gate electrodes over the plurality of gate dielectrics. The second capacitor includes an isolation region, a second plurality of gate stacks over the isolation region, and a plurality of conductive strips over the isolation region and parallel to the second plurality of gate stacks. The second plurality of gate stacks and the plurality of conductive strips are laid out alternatingly.
Claims20
A device comprising:
- a semiconductor substrate;
- an isolation region over the semiconductor substrate;
- a first plurality of capacitors having a same first structure, the first plurality of capacitors comprising varactors, with the varactors comprising active regions;
- a second plurality of capacitors having a same second structure, wherein the second plurality of capacitors are free from active regions;
- and
- conductive features connecting the first plurality of capacitors and the second plurality of capacitors in parallel as an integrated capacitor.
A device comprising:
- a semiconductor substrate;
- a plurality of dielectric isolation regions over the semiconductor substrate;
- and
- an integrated capacitor comprising:
- a first capacitor comprising:
- an active region over and interfacing with the semiconductor substrate, wherein the active region comprises a semiconductor region;
- a gate dielectric over the active region;
- and
- a gate electrode overlying the gate dielectric;
- and
- a second capacitor comprising:
- a first conductive strip over the dielectric isolation region, wherein the first conductive strip and the active region are interconnected, and are connected to a first node;
- and
- a second conductive strip over the dielectric isolation region, wherein the second conductive strip and the gate electrode are interconnected, and are connected to a second node.
A device comprising:
- a first plurality of capacitors, wherein first structures of the first plurality of capacitors are identical to each other, and wherein the first plurality of capacitors are arranged into an array comprising a plurality of columns and a plurality of rows;
- and
- a second plurality of capacitors, wherein second structures of the second plurality of capacitors are identical to each other, and are different from the first structures of the first plurality of capacitors, and wherein the second plurality of capacitors are inserted into the array and into the plurality of columns and the plurality of rows, and wherein first parts of the first plurality of capacitors and second parts of the first plurality of capacitors in a same column are arranged alternatingly.
Dependencies are inferred from the claim text.