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US 2026/0149452 A1Published application
Electronic device having low power and area-efficient logic cell-based sram
AssigneeMediatek Inc.
InventorsManish TRIVEDI, Ramesh HALLI, Sriharsha ENJAPURI, Trivikram DOMMETI, Girishankar GURUMURTHY
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Abstract
An electronic device includes a logic cell. The logic cell includes a plurality of N-bit cells and a plurality of P-bit cells. The N-bit cells and the P-bit cells are alternately row-wise to constitute one column of the logic cell array. The N-bit cells are disposed on even rows of the logic cell array, and the P-bit cells are disposed on odd rows of the logic cell array.
Claims21
An electronic device, comprising:
- a logic cell array, comprising:
- a plurality of N-bit cells;
- and
- a plurality of P-bit cells,
- wherein the N-bit cells and the P-bit cells are alternately row-wise to constitute one column of the logic cell array;
- wherein the N-bit cells are disposed on even rows of the logic cell array, and the P-bit cells are disposed on odd rows of the logic cell array.
3 more elements
Dependencies are inferred from the claim text.