Transparent communications within and among nodes using a bridging network interface device for ai accelerator system

A method of transferring data between a pair of AI accelerator devices within a node, the node having at least a pair of processing units, each of the processing units being coupled to a peripheral component interconnect express (PCIe) switch, the PCIe switch being coupled to a plurality of AI accelerator devices and an intranode source network interface card (NIC) device, the method comprising:

• receiving data and an associated task ID in a PCIe format from the AI accelerator using a write port coupled to the intranode source NIC device;
• translating the data and the associated task ID into an Ethernet format using a look up table (LUT) in a memory device of the intranode source NIC device;
• assigning a destination AI accelerator card ID from the LUT to the data in the Ethernet format such that the data has the associated task ID and the card ID;
• transferring the data in the Ethernet format through a point-to-point connectivity from the NIC device to an intranode destination NIC device;
• receiving the data from a write port coupled to the internode destination NIC device;
• translating the data and the associated task ID and the card ID using a look up table in a memory device of the intranode destination NIC device;
• transferring the data and the associated task ID and the card ID to a destination AI accelerator device;
• operating a compiler in a host processor to generate one or more of the task IDs for one or more LUTs such that the operation of the compiler is operably decoupled from one or more of the preceding steps of receiving, assigning, receiving, and transferring;
• and
• maintaining the node within a spatial location such that the spatial location is configured within a housing structure.

A method of transferring data between a pair of AI accelerator devices between at least a pair of nodes including a first node and a second node, each node being characterized by at least a pair of processing units, each of the processing units coupled to a peripheral component interconnect express (PCIe) switch, the PCIe switch coupled to a plurality of AI accelerator devices and an internode source network interface card (NIC) device, the method comprising:

• receiving data and associated task ID in a PCIe format from the AI accelerator using a write port coupled to the internode source NIC device in the first node;
• translating the data and the associated task ID into an Ethernet format using a look up table (LUT) in a memory device of the internode source NIC device;
• assigning a destination AI accelerator card ID and a network (e.g., IP, MAC) address from the LUT to the data in the Ethernet format such that the data has the associated task ID, the network address, and the card ID;
• transferring the data in the Ethernet format having a transfer rate of at least 32 Giga transfers per second through a point-to-point connectivity through a node switch device and an Ethernet network with at least 1.75 inches from the internode source NIC device to an internode destination NIC device in the second node;
• receiving the data from a write port coupled to the internode destination NIC device;
• translating the data and the associated task ID and the card ID using a LUT in a memory device of the internode destination NIC device;
• transferring the data and the associated task ID, and the card ID to a destination AI accelerator device in a second node;
• operating a compiler in a host processor to generate one or more of the task IDs for one or more LUTs such that the operation of the compiler is operably decoupled from one or more of the preceding steps of receiving, assigning, receiving, and transferring;
• and
• maintaining each of the first and the second nodes within a spatial location such that the spatial location is configured within a housing structure.