Exception control

A method comprising:

• performing data processing in one of a plurality of exception levels supported by the processing circuitry;
• and
• controlling taking of exceptions by the processing circuitry, depending on control information stored in at least one register, the control information including at least:
• masking control information settable to one of a masked state and an unmasked state;
• and
• trap-masked-exception control information settable by software to one of an untrapped state and a trapped state;
• in which:
• in response to a given exception of a maskable class of exceptions which are maskable based on setting the masking control information to the masked state, the method comprises:
• determine whether the masking control information is in the masked state;
• in at least one scenario when the given exception occurs when the masking control information is in the masked state and a current exception level is less privileged than a predetermined trap target exception level associated with the trap-masked-exception control information, control whether to trap the given exception to the predetermined trap target exception level depending on whether the trap-masked-exception control information is in the trapped state;
• and
• in a case when the masking control information is in the unmasked state and the given exception is determined not to be masked, select a target exception level for handling the given exception, the target exception level being selected independent of the trap-masked-exception control information.

A computer program comprising instructions which, when executed by a host data processing apparatus, control the host data processing apparatus to provide an instruction execution environment for executing target code, the computer program comprising:

• processing program logic to simulate execution of instructions of the target code in one of a plurality of exception levels;
• and
• exception control program logic to simulate taking of exceptions, depending on control information stored in at least one storage location of the host data processing apparatus representing at least one register of a target instruction set architecture used by the target code, the control information including at least:
• masking control information settable to one of a masked state and an unmasked state;
• and
• trap-masked-exception control information settable by software to one of an untrapped state and a trapped state;
• in which:
• in response to a given exception of a maskable class of exceptions which are maskable based on setting the masking control information to the masked state, the exception control program logic is configured to:
• determine whether the masking control information is in the masked state;
• in at least one scenario when the given exception occurs when the masking control information is in the masked state and a current exception level is less privileged than a predetermined trap target exception level associated with the trap-masked-exception control information, control whether to trap the given exception to the predetermined trap target exception level depending on whether the trap-masked-exception control information is in the trapped state;
• and
• in a case when the masking control information is in the unmasked state and the given exception is determined not to be masked, select a target exception level for handling the given exception, the target exception level being selected independent of the trap-masked-exception control information.