High speed serial protocol low frequency periodic signaling detection

A detector for detecting a Low Frequency Periodic Signal (LFPS) transmitted on a DisplayPort (DP) cable, the detector comprising:

• a Serializer/Deserializer (SerDes) interface circuit, wherein the SerDes interface circuit is configured to sample a signal on the DP cable to generate a serial bit stream;
• a decimation encoder circuit coupled to the SerDes interface circuit and configured to generated a symbol stream by mapping every first number of bits in the serial bit stream into a symbol of the symbol stream, wherein the symbol has a multi-bit value;
• a pulse width estimator coupled to the decimation encoder circuit and configured to estimate a width of a most recent pulse in a sequence of bits in the serial bit stream, wherein the sequence of bits correspond to a pre-determined number of most recent symbols generated by the decimation encoder circuit;
• and
• a state machine coupled to the pulse width estimator, wherein the state machine is configured to declare detection of the LFPS in response to detecting that the width of the most recent pulse in the sequence of bits is within a pre-determined range for a pre-determined period of time.

A method of detecting a periodic square wave in a received signal, the method comprising:

• sampling, using an interface circuit, an input signal carrying the periodic square wave to generate a serial bit stream;
• generating, using a decimation encoder circuit coupled to the interface circuit, a symbol stream having a symbol rate lower than a bit rate of the serial bit stream, wherein the decimation encoder circuit maps every first number of bits in the serial bit stream into a symbol in the symbol stream;
• generating, using a pulse width estimator coupled to the decimation encoder circuit, an estimated width of a most recent pulse in a sequence of bits in the serial bit stream, wherein the sequence of bits correspond to a pre-determined number of most recent symbols generated by the decimation encoder circuit;
• and
• detecting, using a state machine coupled to the pulse width estimator, that the estimated width of the most recent pulse is within a pre-determined range for a pre-determined period of time.