Method of manufacturing a semiconductor package and semiconductor package manufactured by the same
AssigneeSK hynix Inc.
InventorsSu Ji UM, Min Hee PARK
Life of this patent
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Abstract
A method of manufacturing a semiconductor package of stacked semiconductor chips includes forming a reverse wire bond by bonding one end of a reverse wire to a chip pad of the second-highest semiconductor chip of the stacked semiconductor chips and connecting the other end of the reverse wire to a conductive bump on a chip pad of the uppermost semiconductor chip of the stacked semiconductor chips. The method also includes molding the stacked semiconductor chips with the reverse wire bond using a mold layer. The method further includes processing the mold layer to expose the conductive bump and the other end of the reverse wire in the reverse wire bond through an upper surface of the mold layer.
Claims4
A semiconductor package comprising:
- a multi-stack structure including at least two semiconductor chips stacked on a carrier substrate with an offset so that chip pads of the semiconductor chips are exposed;
- a mold layer configured to mold the multi-stack structure;
- a vertical wire having one end bonded to a chip pad of a second-highest semiconductor chip under an uppermost semiconductor chip of the at least two stacked semiconductor chips to form a vertical wire bond, the other end of the vertical wire extending through the mold layer to be exposed above an upper surface of the mold layer;
- and
- a conductive bump formed on a chip pad of the uppermost semiconductor chip, the conductive bump exposed through an upper surface of the mold layer.
Dependencies are inferred from the claim text.