Reduced size arithmetic unit for multiplication and division
AssigneeNorthrop Grumman Systems Corporation
InventorsKYLE DAVID SHIFLETT, BRIAN R. KONIGSBURG
Life of this patent
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Abstract
An arithmetic unit implemented as an integrated circuit includes control logic configured to receive a control input representing a multiplication operation or a division operation and configure significand logic to perform a selected one of the multiplication operation and the division operation. The significand logic is configured to receive a first operand and a second operand and perform the selected operation on at least a portion of the first operand and at least a portion of the second operand.
Claims20
An arithmetic unit implemented as an integrated circuit, the arithmetic unit comprising:
- control logic configured to receive a control input representing one of a multiplication operation and a division operation and configure significand logic to perform the one of the multiplication operation and the division operation;
- and
- the significand logic, which is configured to receive a first operand and a second operand and perform the one of the multiplication operation and the division operation on at least a portion of the first operand and at least a portion of the second operand.
A method comprising:
- receiving a first operand, a second operand, and a control input representing one of a multiplication operation and a division operation at an arithmetic unit;
- configuring significand logic associated with the arithmetic unit to perform the one of the multiplication operation and the division operation;
- and
- performing the one of the multiplication operation and the division operation on at least a portion of the first operand and at least a portion of the second operand at the significand logic.
An arithmetic unit implemented as an integrated circuit, the arithmetic unit comprising:
- control logic configured to receive a control input representing one of a floating-point division operation, a floating-point multiplication operation, and an integer multiplication operation and configure significand logic to perform the one of the floating-point division operation, the floating-point multiplication operation, and the integer multiplication operation;
- and
- the significand logic, which is configured to receive a first operand and a second operand and perform the one of the floating-point division operation, the floating-point multiplication operation, and the integer multiplication operation on at least a portion of the first operand and at least a portion of the second operand.
Dependencies are inferred from the claim text.