Semiconductor test apparatus
AssigneesSamsung Electronics Co., Ltd., Iucf-Hyu (Industry-University Cooperation Foundation Hanyang University)
InventorsHyunmi HONG, Dongeun SHIN, Seonmi LEE, Dahm YU, Jihyun CHOI, Hongyun SO, Junho KIM, Sangyeun PARK, Byungkwon CHUN
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Abstract
A semiconductor test apparatus includes a chamber, at least one high-temperature chuck in the chamber, at least one low-temperature chuck opposite the at least one high-temperature chuck, at least one semiconductor test board between the at least one high-temperature chuck and the at least one low-temperature chuck, and a rack configured to move the at least one semiconductor test board within a space between the at least one high-temperature chuck and the at least one low-temperature chuck.
Claims20
A semiconductor test apparatus comprising:
- a chamber;
- at least one high-temperature chuck in the chamber;
- at least one low-temperature chuck opposite the at least one high-temperature chuck;
- at least one semiconductor test board between the at least one high-temperature chuck and the at least one low-temperature chuck;
- and
- a rack configured to move the at least one semiconductor test board within a space between the at least one high-temperature chuck and the at least one low-temperature chuck.
A semiconductor test apparatus for testing at least one device under test (DUT), the semiconductor apparatus comprising:
- a chamber having an internal space;
- a chuck assembly including at least one first chuck and at least one second chuck alternately stacked in a vertical direction in the internal space, the chuck assembly configured to conduct heat to at least one DUT;
- at least one semiconductor test board between the at least one first chuck and the at least one second chuck, the at least one semiconductor test board configured to store the at least one DUT;
- and
- a movement device configured to move at least one of the chuck assembly and the at least one semiconductor test board, such that the at least one semiconductor test board is heated by at least one of the at least one first chuck and the at least one second chuck.
A semiconductor test apparatus comprising:
- a chamber having an internal space;
- at least one first chuck in the internal space;
- a contact housing on a lower surface of the at least one first chuck, the contact housing including a plurality of contact protrusions protruding downwardly;
- a semiconductor test board including a plurality of sockets, the plurality of sockets configured to respectively receive a plurality of devices under test (DUTs), the semiconductor test board configured to electrically connect to the plurality of DUTs through the plurality of sockets;
- and
- a rack configured to move the semiconductor test board such that the plurality of contact protrusions contact the plurality of DUTs.
Dependencies are inferred from the claim text.