Precise Wafer Alignment
AssigneeIntelligent Memory Limited
InventorPeter Poechmueller
Life of this patent
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Abstract
A chip or wafer has at least two electrically conducting alignment marks that contact at least two electrically conductive probe needles on a probe card. The at least two electrically conducting alignment marks each have an electrical signal that can transfer from the alignment marks to the electrically conductive probe needles. The two electrical signals can have a different voltage level or a different signal frequency than one another. The electrical signals are used to calculate a rotational deviation and/or lateral deviation of the chip or wafer relative to the probe card for precise wafer alignment.
Claims14
A chip or wafer comprising:
- at least two electrically conducting alignment marks configured to contact at least two electrically conductive probe needles on a probe card;
- at least two electrical signals that can transfer from the at least two alignment marks to the at least two electrically conductive probe needles;
- and
- wherein the at least two electrical signals have a different voltage level or a different signal frequency than one another.
A system for probing a chip or wafer, comprising:
- an electrical wafer chuck for mounting a chip or wafer for testing;
- a probe card having a plurality of probe needles for receiving a plurality of electrical signals from a plurality of electrically conducting alignment marks on the chip or wafer;
- and
- a processor and one or more executable software instructions programmed to correct alignment of the wafer chuck relative to the probe card based on the plurality of electrical signals.
Dependencies are inferred from the claim text.