Passivation layer and barrier layer in gate structures
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsCheng-Ming Lin, Tsung-Kai Chiu, Wei-Yen Woon, Szuya Liao, Kai-Chieh Yang
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AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsCheng-Ming Lin, Tsung-Kai Chiu, Wei-Yen Woon, Szuya Liao, Kai-Chieh Yang
Estimating the term…
A method includes providing a structure. The structure includes a stack of bottom channel layers, a stack of top channel layers disposed over the stack of bottom channel layers, an isolation feature sandwiched by the stack of bottom channel layers and the stack of bottom channel layers, and a first work function metal (WFM) layer wrapping around each of the bottom channel layers. The method further includes forming a second WFM layer wrapping around each of the top channel layers, forming a passivation layer on the second WFM layer by performing a gas treatment to the structure, and forming a metal fill layer over the passivation layer.
A method comprising:
A method comprising:
A semiconductor structure, comprising:
Dependencies are inferred from the claim text.