Semiconductor device and electronic control system
AssigneeRenesas Electronics Corporation
InventorAkihiro NAKAHARA
Life of this patent
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Abstract
A discharge transistor is formed on a semiconductor substrate, and controls a power transistor to the OFF state by short-circuiting a gate of the power transistor and a reference node when being controlled to the ON state. A reverse current detection circuit detects generation of a reverse current from a power output terminal toward a power supply terminal, and asserts a reverse current detection signal in a period in which a reverse current is generated. A switch control circuit controls a first switch to the ON state and a second switch to the OFF state during the negation period of the reverse current detection signal, and controls the first switch to the OFF state and the second switch to the ON state during the assertion period of the reverse current detection signal.
Claims14
A semiconductor device comprising:
- an output transistor formed on a semiconductor substrate, and connected between a power supply terminal and a power output terminal, and configured to supply power to a load connected to the power output terminal when being controlled to the ON state;
- a first switch configured to connect the power output terminal to a reference node;
- a second switch configured to connect the power supply terminal to the reference node;
- a first control transistor formed on the semiconductor substrate, and configured to control the output transistor to the OFF state by short-circuiting a gate of the output transistor and the reference node when being controlled to the ON state;
- a reverse current detection circuit configured to detect generation of a reverse current from the power output terminal toward the power supply terminal and assert a reverse current detection signal in a period in which the reverse current is generated;
- and
- a switch control circuit configured to control the first switch to the ON state and the second switch to the OFF state in a negation period of the reverse current detection signal, and control the first switch to the OFF state and the second switch to the ON state in an assertion period of the reverse current detection signal.
An electronic control system comprising:
- a power supply terminal to which a power supply voltage is supplied;
- a power output terminal to which a load is connected;
- a semiconductor device configured to supply power to the load;
- and
- a control device configured to control the semiconductor device,
- wherein the semiconductor device comprises:
- an output transistor formed on a semiconductor substrate, and connected between the power supply terminal and the power output terminal, and configured to supply power to the load when being controlled to the ON state;
- a first switch configured to connect the power output terminal to a reference node;
- a second switch configured to connect the power supply terminal to the reference node;
- a first control transistor formed on the semiconductor substrate, and configured to control the output transistor to the OFF state by short-circuiting a gate of the output transistor and the reference node when being controlled to the ON state;
- a reverse current detection circuit configured to detect generation of a reverse current from the power output terminal toward the power supply terminal and assert a reverse current detection signal in a period in which the reverse current is generated;
- and
- a switch control circuit configured to control the first switch to the ON state and the second switch to the OFF state in a negation period of the reverse current detection signal, and control the first switch to the OFF state and the second switch to the ON state in an assertion period of the reverse current detection signal, and
- wherein the control device outputs an ON/OFF control signal for instructing on/off of the output transistor to the semiconductor device.
Dependencies are inferred from the claim text.