Circuit arrangement for controlling a load

A circuit arrangement for driving a load, the circuit arrangement comprising:

• a ground terminal and a supply terminal for applying a supply voltage,
• a first input terminal for inputting a voltage signal in order to switch between states of the load,
• a first and a second output terminal for respectively outputting a first and second output voltage for driving the load, or a common output terminal for outputting a common output voltage for driving the load,
• a first transistor and a second transistor, (i) wherein the first transistor is formed as a PNP bipolar transistor and the second transistor is formed as an NPN bipolar transistor or as an N-channel field-effect transistor or (ii) wherein the first transistor is formed as an NPN bipolar transistor and the second transistor is formed as a PNP bipolar transistor or as a P-channel field-effect transistor,
• a first signal path which is connected directly or via a first resistor between the first input terminal and a base of the first transistor, and
• a second signal path which is connected directly or via the first resistor between the first input terminal and a base or a gate of the second transistor, wherein
• an emitter of the first transistor is connected directly or via a supply resistor to the supply terminal,
• a collector of the first transistor is connected directly or via a first internal output resistor to the first output terminal or to the common output terminal,
• an emitter or a source of the second transistor is connected directly or via an emitter resistor to the ground terminal,
• the collector or a drain of the second transistor is connected directly or via a second internal output resistor to the second output terminal or to the common output terminal,
• the first signal path contains a level shifter which is configured to shift the voltage signal into a level range suitable for switching the first transistor, and
• the first signal path furthermore contains a first capacitor, one end of which is connected directly or via the first resistor to the first input terminal and the other end of which is connected directly or via a second resistor to the base of the first transistor.