Diagnosability for shared output registers
AssigneeInternational Business Machines Corporation
InventorsUma Srinivasan, Matthew Steven Hyde, Daniel Rodko, Thomas J. Knips, Alvan Wing Ng
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AssigneeInternational Business Machines Corporation
InventorsUma Srinivasan, Matthew Steven Hyde, Daniel Rodko, Thomas J. Knips, Alvan Wing Ng
Estimating the term…
Device, system and method for diagnosing and/or repairing memory arrays on a chip. A device includes memory arrays, where each of the memory arrays includes or is arranged with rows and columns of memory cells. A first register is shared by the memory arrays, and operable to receive failing column status data from the memory arrays and store a failing column status bit corresponding to the failing column status data. A second register is operable to receive failing memory array status data from the memory arrays, and set a failing memory array status bit corresponding to the failing memory array status data. A third register is coupled with the second register and operable to set and store an overflow status bit indicating whether more than one of the memory arrays are failing.
A device, comprising:
A method comprising:
A system comprising:
Dependencies are inferred from the claim text.