Method and apparatus for addressing registers within a processor based on indirect registers

A method for addressing registers within a processor, said method comprising:

• providing a set of registers;
• and
• associating a first vector table with said set of registers, each vector table entry being selectable by a vector table index field within an instruction, wherein said processor to access said registers indirectly, wherein said vector table includes a plurality of vector table entries, wherein one of said vector table entries includes;
• a register entry number field containing a register entry number to indicate a first entry of said registers;
• a vector length field containing a vector length number to indicate whether said one vector table entry points to a single entry of said registers or multiple entries of said registers concurrently;
• and
• determining one vector table entry points to multiple entries of said registers concurrently
• a vector stride pattern field containing a stride number to indicate a relative distance between said first entry of said registers and at least one another entry of said registers in response to said one vector table entry pointing to multiple entries of said registers concurrently.