Ripple carry full adder circuit

An electronic device comprising a ripple carry full adder circuit, wherein the ripple carry full adder circuit comprises:

• a sum generation circuit, the sum generation circuit comprising a first bit generation circuit and a second bit generation circuit, wherein the first bit generation circuit is configured to generate a first output sum signal, and the second bit generation circuit is configured to generate a second output sum signal;
• and
• a carry bit generation circuit configured to generate an output carry signal, wherein the carry bit generation circuit comprises a compute logic circuit and a ripple carry generation circuit, the ripple carry generation circuit having a plurality of carry bit generation NAND gates;
• wherein the first bit generation circuit comprises a first NOR gate, a first logic circuit, a first inverter, and a second logic circuit, and
• wherein the second bit generation circuit comprises a second NOR gate, a third logic circuit, a fourth inverter, and a fourth logic circuit.