Gate structures and methods of forming

A method comprising:

• forming a second nanostructure between a first nanostructure and a third nanostructure, wherein the first nanostructure, the second nanostructure, and the third nanostructure are vertically stacked;
• removing the second nanostructure to define a recess between the first nanostructure and the third nanostructure, wherein removing the second nanostructure leaves a semiconductor residue on surfaces of the first nanostructure and the third nanostructure in the recess;
• performing an etching process to remove the semiconductor residue;
• after performing the etching process, performing a surface repair process in the recess, wherein the surface repair process increases a curvature of one or more surfaces in the recess;
• and
• forming a gate structure in the recess around the first nanostructure and the third nanostructure.

A device comprising:

• a first nanostructure extending from a first source/drain region to a second source/drain region;
• a second nanostructure extending from the first source/drain region to the second source/drain region;
• and
• a gate structure between the first nanostructure and the second nanostructure, wherein a center region of the gate structure has a height than an edge region of the gate structure, and wherein the gate structure has a curved lateral surface at an interface between the first nanostructure and the gate structures.