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US 2026/0128252 A1Published application
Vertical electrode configuration
AssigneeApplied Materials, Inc.
InventorsKALLOL BERA, RUPALI SAHU, SATHYA SWAROOP GANTA, SHAHID RAUF
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Abstract
Embodiments disclosed herein include electrode configurations for a plasma-enhanced deposition process. In an example, an electrode configuration includes a stack of wafer processing regions aligned along a vertical axis. A plurality of electrodes is surrounding the stack of wafer processing regions. Each one of the plurality of electrodes is extending along the vertical axis.
Claims20
An electrode configuration for a plasma-enhanced deposition process comprising:
- a stack of wafer processing regions aligned along a vertical axis;
- and
- a plurality of electrodes surrounding the stack of wafer processing regions, each one of the plurality of electrodes extending along the vertical axis.
A plasma process chamber, comprising:
- a stack of wafer support pedestals aligned along a vertical axis, each of the wafer support pedestals comprising a corresponding processing region;
- and
- a plurality of electrodes surrounding the stack of wafer processing regions, each one of the plurality of electrodes extending along the vertical axis.
A process chamber, comprising:
- a plurality of vertically stacked ceramic wafer pedestals;
- and
- a plurality of RF electrodes, wherein each one of the plurality of RF electrodes carries the same RF potential amplitude but has phase difference with an adjacent one of the plurality of electrodes of 30-150 degrees.
Dependencies are inferred from the claim text.