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US 2026/0128082 A1Published application
Sense Amplifier Circuitry and Threshold Voltage Compensation
AssigneeMicron Technology, Inc.
InventorsWenlun Zhang, Hiroki Fujisawa, Shinichi Miyatake, Yuan He
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Abstract
Sense amplifiers for memory devices may include threshold voltage compensation circuitry configured to compensate a threshold voltage offset of a portion of the sense amplifier. Additionally, the sense amplifiers also perform pre-sensing of the portion of the sense amplifier. Moreover, the sense amplifier is configured to perform main sensing and latching in a phase after pre-sensing the portion of the sense amplifier.
Claims20
A method of operating a memory device, comprising:
- compensating a threshold voltage offset of a portion of a sense amplifier of the memory device, wherein the portion comprises a first pair of transistors each coupled to a respective digit line and a respective gut node of the sense amplifier and further comprises a second pair of transistors each cross-coupled to multiple gut nodes of the sense amplifier, wherein compensating the threshold voltage offset comprises alternating a supplied voltage to the second pair of transistors by alternating activation of a plurality of supply transistors;
- performing pre-sensing of the portion of the sense amplifier;
- and
- performing main sensing and latching in a phase after pre-sensing the portion of the sense amplifier.
1 more element
A sense amplifier, comprising:
- a first transistor coupled between a first node configured to receive an activation signal, a first digit line, and a second digit line, wherein the first digit line is configured to receive a first charge from one or more memory cells corresponding to the sense amplifier for sensing, the second digit line is configured to receive a second charge from the one or more memory cells and is complementary to the first digit line;
- a second transistor coupled between the first node, the first digit line, and a second digit line;
- a third transistor coupled between a first gut node corresponding to the first digit line, a second gut node corresponding to the second digit line, and a second node configured to receive a strobe signal;
- a fourth transistor coupled between the first gut node, the second gut node, and the second node;
- and
- threshold voltage compensation circuitry configured to:
- compensate for a threshold voltage offset between the third and fourth transistors during a voltage threshold compensation phase by supplying a first voltage to the second node during a first part of the voltage threshold compensation phase and by supplying a second voltage to the second node during a second part of the voltage compensation phase;
- pre-sense during a pre-sense phase;
- and
- sense and latch during a main sensing and latching phase after the pre-sense phase.
7 more elements
A memory device, comprising:
- one or more memory cells configured to store data;
- a pair of digit lines coupled to the one or more memory cells;
- and
- a sense amplifier coupled to the pair of digit lines and comprising:
- a pair of cross-coupled transistors each coupled to a first node configured to receive a strobe signal and each of the pair of cross-coupled transistors coupled to a first gut node at a first terminal and a second gut node at a second terminal;
- the first gut node corresponding to a first digit line of the pair of digit lines;
- the second gut node corresponding to a second digit line of the pair of digit lines;
- a third transistor coupled to the first gut node and the second digit line;
- a fourth transistor coupled to the second gut node and the first digit line;
- and
- threshold voltage compensation circuitry configured to compensate for a threshold voltage offset during a voltage threshold compensation phase by selecting a supply voltage to the first node from a plurality of supply voltages.
8 more elements
Dependencies are inferred from the claim text.