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US 2026/0123478 A1Published application
Integrated circuit package and manufacturing method
AssigneeSTMicroelectronics International N.V.
InventorYounes BOUTALEB
Life of this patent
Estimating the term…
Abstract
The present disclosure provides for packaging integrated circuits. In an example package, an adhesive is contained between a rear face of a chip and a front face of a carrier substrate when the chip is placed and attached on the carrier substrate. In this regard, the rear face of the chip has first blind holes and the front face of the carrier substrate has second blind holes defining housings used to contain the adhesive.
Claims17
A package comprising:
- an electronic chip including a front face having contact pads and a rear face having a plurality of first blind holes spread around a periphery of the rear face and opening onto the rear face;
- a carrier substrate having a front face opposite and at a distance from the rear face of the electronic chip and having a plurality of bond fingers and a plurality of second blind holes opening onto the front face respectively opposite the plurality of first blind holes of the electronic chip, each pair of a first blind hole and a second blind hole facing each other defining a housing;
- a pillar of a first adhesive material in each housing;
- bond wires between the contact pads and the plurality of bond fingers;
- and
- an encapsulating material covering the bond wires and at least partially the electronic chip, part of the encapsulating material being located in a space between the rear face of the electronic chip and the front face of the carrier substrate.
3 more elements
A method for manufacturing a package, comprising:
- providing an electronic chip including a front face having contact pads and a rear face;
- forming on the rear face a plurality of first blind holes spread around a periphery of the rear face and opening onto the rear face;
- providing a carrier substrate having a front face having an area intended to be opposite the rear face of the electronic chip and a plurality of bond fingers outside of the area;
- forming at the periphery of the area a plurality of second blind holes opening onto the front face;
- filling the plurality of second blind holes with a first adhesive material in a liquid state in an amount so as to obtain a surplus of a first material overhanging the plurality of second blind holes;
- placing the rear face of the electronic chip opposite and at a distance from the area so as to align the plurality of first blind holes and the plurality of second blind holes respectively and allow penetration of the surplus of the first material into the plurality of first blind holes, and solidifying the first material so as to obtain pillars of the first material extending into each pair of a first blind hole and a second blind hole and into a space between each pair;
- bonding bond wires between the contact pads and the plurality of bond fingers;
- and
- covering the bond wires and at least part of the electronic chip with an encapsulating material which is also inserted into a space between the rear face of the electronic chip and the front face of the carrier substrate.
6 more elements
Dependencies are inferred from the claim text.