Semiconductor device
AssigneeSamsung Electronics Co., Ltd.
InventorsTAEHUN KIM, GYEONG-SEON PARK, JAEHYUK LIM, MINGU KO, YOUNG HWAN PARK, Jeonghwan PARK, Sewoong OH
Life of this patent
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Abstract
Provided is a semiconductor device including a substrate, a semiconductor chip on the substrate, and a bonding layer between the substrate and the semiconductor chip, wherein the bonding layer includes a transition metal, a low-melting-point metal having a melting point lower than a melting point of the transition metal, a noble metal, and an alloy thereof, and a percentage of the noble metal in the bonding layer is greater in a central portion of the bonding layer than at peripheral portions of the bonding layer in a first direction of the bonding layer.
Claims20
A semiconductor device comprising a substrate;
- a semiconductor chip on the substrate;
- and
- a bonding layer between the substrate and the semiconductor chip;
- wherein the bonding layer comprises a transition metal, a low-melting-point metal having a melting point lower than a melting point of the transition metal, a noble metal, and an alloy thereof, and
- wherein a percentage of the noble metal in the bonding layer is greater in a central portion of the bonding layer than at peripheral portions of the bonding layer in a first direction of the bonding layer.
A semiconductor device comprising
- a substrate;
- a semiconductor chip on the substrate;
- and
- a bonding layer between the substrate and the semiconductor chip,
- wherein the bonding layer comprises, in a first direction of the bonding layer, a first layer on the semiconductor chip, a second layer on the substrate, an interface layer between the first layer and the second layer, a first diffusion barrier layer between the semiconductor chip and the first layer, and a second diffusion barrier layer between the substrate and the second layer,
- wherein the first layer and the second layer comprise nickel (Ni), tin (Sn), and an alloy thereof,
- wherein the interface layer comprises nickel (Ni), tin (Sn), gold (Au), and an alloy thereof, and
- wherein the first diffusion barrier layer and the second diffusion barrier layer comprise titanium (Ti), titanium nitride (TiN), titanium tungsten (Ti—W), platinum (Pt), chromium (Cr), or a combination thereof.
A semiconductor device comprising
- a substrate;
- a semiconductor chip on the substrate;
- and
- a bonding layer between the substrate and the semiconductor chip;
- wherein the semiconductor chip comprises:
- a drain electrode,
- a first conductivity type semiconductor layer on the drain electrode,
- a second conductivity type doped well region in the first conductivity type semiconductor layer,
- a gate electrode on the first conductivity type semiconductor layer,
- a gate insulation layer between the first conductivity type semiconductor layer and the gate electrode, and
- a source electrode on the second conductivity type doped well region,
- wherein the bonding layer comprises a transition metal, a low-melting-point metal having a melting point lower than that of the transition metal, and an alloy thereof, and
- wherein the drain electrode of the semiconductor chip comprises the transition metal.
Dependencies are inferred from the claim text.