Method and system for calculating forward error correction with a reduced number of gates in fec encoders
AssigneeInova Semiconductors GmbH
InventorsFabian KLUGE, Roland NEUMANN
Life of this patent
Estimating the term…
Loading patent…
AssigneeInova Semiconductors GmbH
InventorsFabian KLUGE, Roland NEUMANN
Estimating the term…
A method for improving forward error correction in serial coding during data transmission in a vehicle offers an advantage that the physical behavior on a transmission channel can be deterministically controlled despite a reduction in resource requirements. A number of gates in the forward error correction encoders is reduced by using preliminary calculations of the forward error correction on individual subwords to minimize exponential growth in a number of gates required. Bit errors are minimal and a transmission error can be corrected efficiently. Encoders used are designed with a minimal number of gates, and the proposed method implicitly includes nesting that allows so-called burst errors to be corrected advantageously. This nesting makes it possible to eliminate conventional buffer memory required by explicit nesting. The method further ensures that user data and corrective metadata, can be encoded for advantageous transmission. Also provided is a system for implementing the method.
A method for calculating a forward error correction with a reduced number of
A system arrangement for calculating a forward error correction with a reduced number of gates for FEC coders, comprising:
Dependencies are inferred from the claim text.