Hybrid computing-in-memory (cim) device and a method for sensing multi-level data bit with the same

Abstract

The present invention provides A hybrid computing-in-memory (CIM) device, comprising: an array of resistive random-access memory (ReRAM) cells, each ReRAM cell configured to exhibit multiple resistance states for storing multiple data bits; a static random-access memory (SRAM) cell configured for temporally retaining multiple data bits loaded from the array of ReRAM cells for performing a CIM operation; a differentially sensing circuit coupled between the array of ReRAM cells and the SRAM cell, and configured for differentially sensing a most significant bit (MSB) and a least significant bit (LSB) of the data when the data is loaded from a ReRAM cell to the SRAM cell.

Dependencies are inferred from the claim text.