Method for modifying a conductance value of a phase change memory cell during an inference cycle
AssigneeCommissariat A L'energie Atomique Et Aux Energies Alternatives
InventorsJoel MINGUET LOPEZ, Tifenn Hirtzlin, Gabriele Navarro
Life of this patent
Estimating the term…
Abstract
A method for modifying a conductance or resistance value within a resistance distribution range defined around a median resistance distribution value of at least one phase change memory cell, the method including: a determination step in which a melting current and an amorphous phase current are determined; a quenching step in which a first pulse with a steep falling ramp having a quenching effect is applied to the at least one phase change memory cell; a crystallization step in which a second pulse with a progressively falling ramp is applied to at least one phase change memory cell.
Claims12
A method for modifying a conductance value, or resistance, respectively, in a resistance distribution range defined around a median resistance distribution value, or conductance, respectively, of at least one phase change memory cell, the at least one phase change memory cell being comprised in a memory array comprising a plurality of memory cells, the at least one memory cell comprising a lower electrode, an upper electrode, and a phase change material located between the lower electrode and the upper electrode, the phase change material being capable of assuming a crystalline, partially amorphous or completely amorphous state at an interface with the lower electrode, the method being implemented by a neural network and comprising:
- a determination step in which a melting current and an amorphous phase current are determined for the at least one phase change memory cell, the melting current corresponding to the current causing at least a partial localized melting of the phase change material at the interface with the lower electrode when it is applied to the at least one phase change memory cell, the amorphous phase current corresponding to the current causing a creation of a completely amorphous state at the interface with the lower electrode when it is applied to the at least one phase change memory cell;
- a quenching step in which a first pulse at a modification current greater than or equal to the melting current and strictly less than the amorphous phase current is applied to the at least one phase change memory cell, the first pulse having a rising ramp then a steep falling ramp having a quenching effect;
- a crystallization step in which a second pulse at the modification current is applied to the at least one phase change memory cell, the at least one phase change memory cell being identical to the at least one phase change memory cell of the quenching step, the second pulse having a rising ramp then a gradual falling ramp.
Dependencies are inferred from the claim text.