US 2026/0119346 A1 · BLOCK RETIREMENT BASED ON DEGRADATION

Abstract

A programming voltage is applied to a NAND memory cell in order to program the memory cell. Over time, the NAND memory cell degrades and can no longer store data. As the memory cell degrades, repeated programming cycles may be needed to successfully program the memory cell, increasing the amount of time that the programming process takes. In current memory systems, the life of the memory system is increased by keeping blocks in use until they can no longer be successfully programmed. As disclosed herein, if the performance of a memory block is determined to be substantially worse than the average performance of the memory blocks of the memory system, the memory block is retired even though it can successfully be programmed. As a result, the performance of the memory system is improved by avoiding lengthy programming cycles for the degraded block.

Claims20

Dependent claims

A memory system comprising:

a memory component comprising a plurality of blocks, wherein each block of the plurality of blocks comprises multiple memory cells;
and
a processing device programmed to perform operations comprising:
determining an average error correction rate for the plurality of blocks;
based on the average error correction rate, determining a threshold error correction rate;
and
based on a relationship between the threshold error correction rate and an error correction rate for a block of the plurality of blocks, retiring the block.

4 more elements

Dependencies are inferred from the claim text.

Block retirement based on degradation

Life of this patent

Block retirement based on degradation

Life of this patent

Abstract

Claims20