Pipeline stage allocation

A method comprising:

• issuing an instruction to be executed in a plurality of pipeline stages such that younger instructions are not permitted to be issued before older instructions;
• and
• scheduling instructions to be executed in a given cycle in the plurality of pipeline stages, such that the instruction is permitted to be executed in an order different to a program order in response to respective input operand data being available, by dynamically allocating which of the plurality of pipeline stages a given execution unit of a plurality of execution units is assigned to in the given cycle, wherein:
• in a first configuration selectable for the given cycle, causing the given execution unit of the plurality of execution units to be assigned to a first pipeline stage of the plurality of pipeline stages;
• and
• in a second configuration selectable for the given cycle, causing the given execution unit to be assigned to a second pipeline stage of the plurality of pipeline stages.

A non-transitory computer-readable medium storing computer-readable code for fabrication of an apparatus comprising:

• processing circuitry comprising a plurality of execution units;
• issue circuitry configured to issue an instruction to be executed by the processing circuitry in a plurality of pipeline stages such that younger instructions are not permitted to be issued before older instructions;
• and
• scheduling circuitry configured to schedule instructions to be executed in a given cycle in the plurality of pipeline stages, such that the instruction is permitted to be executed in an order different to a program order in response to respective input operand data being available, by dynamically allocating which of the plurality of pipeline stages a given execution unit of the plurality of execution units is assigned to in the given cycle, wherein:
• in a first configuration selectable for the given cycle, the scheduling circuitry is configured to cause the given execution unit of the plurality of execution units to be assigned to a first pipeline stage of the plurality of pipeline stages;
• and
• in a second configuration selectable for the given cycle, the scheduling circuitry is configured to cause the given execution unit to be assigned to a second pipeline stage of the plurality of pipeline stages.