Memory module including a clock driver supporting dynamic frequency scaling, training method of memory device, and operating method of memory module

A memory module comprising:

• a plurality of memory devices;
• and
• a clock driver device configured to receive an input clock signal and configured to transmit at least one output clock signal which is obtained by delaying the input clock signal, to the plurality of memory devices,
• wherein the clock driver device comprises:
• a register configured to store at least one control word of the clock driver device;
• a PLL circuit configured to receive the input clock signal and to output an intermediate clock signal;
• a frequency detection circuit configured to detect a frequency of the intermediate clock signal;
• and
• a clock tree circuit configured to delay the intermediate clock signal based on the at least one control word associated with the frequency that was detected in the register, and
• wherein the register is configured to store a delay value of each of clock signals of a plurality of driving frequencies in different control words.

A method for operating a memory module, the method comprising:

• receiving an input clock signal from a memory controller;
• receiving, by a PLL circuit, the input clock signal and outputting an intermediate clock signal;
• detecting a frequency of the intermediate clock signal;
• comparing the detected frequency with reference values stored in advance with respect to each of a plurality of driving frequencies;
• and
• generating an output clock signal, which is obtained by applying a delay value corresponding to a driving frequency that is identical to the detected frequency.