Otp memory device and otp memory cell having multiple program transistors

A one-time-programmable (OTP) memory device, comprising:

• a plurality of OTP memory cells on a substrate,
• wherein each of the plurality of OTP memory cells includes a first program transistor having a first breakdown voltage, a second program transistor having a second breakdown voltage, and a read transistor connected to the first program transistor and the second program transistor,
• wherein each of the read transistor, the first program transistor, and the second program transistor includes
• a fin-type active region extending in a first direction on the substrate,
• a plurality of semiconductor patterns spaced apart from an upper surface of the fin-type active region and having a channel region, and
• a gate electrode extending in a second direction on the fin-type active region and arranged between each of the plurality of semiconductor patterns,
• wherein the second direction intersects the first direction,
• wherein the fin-type active region of the first program transistor is a first fin-type active region, the fin-type active region of the second program transistor is a second fin-type active region, and the fin-type active region of the read transistor is a third fin-type active region,
• wherein the first fin-type active region of the first program transistor, the second fin-type active region of the second program transistor, and the third fin-type active region of the read transistor are separated from each other.