Multi-level non-volatile resistive device with write-verify algorithm
OwnerGuoxing MIAO, Manoj SACHDEV +2inventors
InventorsGuoxing MIAO, Manoj SACHDEV, Rabiul ISLAM, Yu SHI
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OwnerGuoxing MIAO, Manoj SACHDEV +2inventors
InventorsGuoxing MIAO, Manoj SACHDEV, Rabiul ISLAM, Yu SHI
Estimating the term…
A resistive memory device configurable to operate in either a volatile or a non-volatile memory modes. The device includes top and bottom electrodes with a lithium imbued TiOx switching layer in between, and in the volatile mode can have LRS or HRS states. The decay time scale is electrically and physically tunable. Electroforming permanently configures the volatile device into non-volatile mode. In the non-volatile memory mode, a state-aware write verify (SAW) algorithm based on the logarithmic time dependence of RESET is used, which provides a feedback mechanism to tune the time duration of write pulse during multi-level programming. The time duration is dependent on the read current difference between current resistance state and target resistance state, therefore, the desired time duration of write pulse for specific target resistance states can be deterministically calculated (read current difference is measured with verify operation). This eliminates the number of intermediate-verify steps needed.
A resistive memory device configurable to operate in volatile or non-volatile modes, comprising:
(canceled)
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