Back to results
US 2026/0107803 A1Published application
Semiconductor package
AssigneeSamsung Electronics Co., Ltd.
InventorHongjin KIM
Life of this patent
Estimating the term…
Abstract
A semiconductor package includes a package substrate including a plurality of bonding pads, a plurality of semiconductor chips mounted on an upper surface of the package substrate, and each including a plurality of pads, the plurality of pads including a power voltage pad, a ground voltage pad, and a first signal pad and a second signal pad adjacent to each other, a plurality of connection lines including a first signal line connecting the first signal pads to the first bonding pad, and a second signal line connecting the second signal pads to the second bonding pad, and a first dummy line disposed between the first signal line and the second signal line.
Claims20
A semiconductor package comprising:
- a package substrate including a plurality of bonding pads, the plurality of bonding pads including a first bonding pad and a second bonding pad;
- a plurality of semiconductor chips mounted on an upper surface of the package substrate, each of the plurality of semiconductor chips including a respective plurality of pads, wherein for each of the plurality of semiconductor chips, the respective plurality of pads includes a power voltage pad, a ground voltage pad, a first signal pad, and a second signal pad adjacent to the first signal pad;
- a plurality of connection lines including a first signal line connecting each of the first signal pads to the first bonding pad, a second signal line connecting each of the second signal pads to the second bonding pad, a first connection line connecting each of the power voltage pads to a respective bonding pad of the plurality of bonding pads, and a second connection line connecting each of the ground voltage pads to a respective bonding pad of the plurality of bonding pads;
- and
- a first dummy line disposed between the first signal line and the second signal line.
2 more elements
A semiconductor package comprising:
- a package substrate including a plurality of bonding pads;
- a plurality of semiconductor chips mounted on an upper surface of the package substrate, each of the plurality of semiconductor chips including a first signal pad and a second signal pad;
- a plurality of connection lines including a first signal line connecting the first signal pad of each of the plurality of semiconductor chips to a first bonding pad of the plurality of bonding pads, and a second signal line connecting the second signal pad of each of the plurality of semiconductor chips to a second bonding pad of the plurality of bonding pads, wherein from a top down view, each of the plurality of connection lines extends in a first direction parallel to the upper surface of the package substrate, and wherein the first signal pad and the second signal pad are disposed adjacent to each other in a second direction parallel to the upper surface of the package substrate;
- and
- a first line extending in the first direction positioned between the first signal line and the second signal line, wherein from a top down view, the first line does not directly connect to and does not extend over any chip pads of the plurality of semiconductor chips.
2 more elements
A semiconductor package comprising:
- a package substrate including a plurality of bonding pads;
- a plurality of semiconductor chips mounted on an upper surface of the package substrate, each of the plurality of semiconductor chips including a respective plurality of pads, wherein for each of the plurality of semiconductor chips, the respective plurality of pads includes a pair of pads adjacent to each other that are configured to transmit or receive a data signal;
- a plurality of connection lines connecting the plurality of pads of each of the plurality of semiconductor chips to respective bonding pads of the plurality of bonding pads, the plurality of connection lines including a first connection line configured to provide a ground voltage, a second connection line configured to provide the ground voltage, and a first signal line and a second signal line respectively connected to the pair of pads of each of the plurality of semiconductor chips;
- a first dummy line between the pair of pads of each of the plurality of semiconductor chips;
- a plurality of second dummy lines connecting the first connection line and the second connection line to the first dummy line;
- and
- a first insulating pattern disposed between the first signal line, the second signal line, and the plurality of second dummy lines.
4 more elements
Dependencies are inferred from the claim text.