# US 2026/0107799 A1 · Substrate structure

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- Number: US 2026/0107799 A1
- Document ID: US20260107799A1
- Status: Published application
- Kind: A1
- Application number: 19/061,396
- Filed: 2025-02-24
- Published: 2026-04-16
- Earliest claimed: 2024-10-16
- Assignees: Siliconware Precision Industries Co., Ltd.
- Applicants: Siliconware Precision Industries Co., Ltd.
- Inventors: Chieh-Yi HSIEH; Jui-Kun WANG; Fang-Wei CHANG; Chih-Wen FAN; Hsiu-Fang CHIEN
- Web page: https://patentgrep.com/patent/US20260107799A1

## CPC

- H10W 70/65: Shapes or dispositions of interconnections
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

Provided is a substrate structure including a substrate body and a plurality of insulating blocks. The substrate body has a circuit layer and is defined with a chip placement area. The plurality of insulating blocks are disposed on the substrate body in the chip placement area and cover part of the circuit layer to reduce the ratio of the exposed circuit layers, thereby the delamination problem can be eliminated.

## Claims

### Claim 1

A substrate structure, comprising:
a substrate body having a circuit layer formed on a surface thereof, wherein the surface of the substrate body is defined with a chip placement area; and
a plurality of insulating blocks formed on the surface of the substrate body and located in the chip placement area to cover a portion of the circuit layer.

### Claim 2 (depends on 1)

The substrate structure of claim 1, wherein a separation distance is present between any two adjacent ones of the plurality of insulating blocks.

### Claim 3 (depends on 2)

The substrate structure of claim 2, wherein the separation distance is greater than 70 μm.

### Claim 4 (depends on 1)

The substrate structure of claim 1, wherein the circuit layer includes a plurality of electrical contact pads for electrically connecting an electronic component in the chip placement area, and a separation distance is present between any one of the plurality of insulating blocks and a corresponding one of the plurality of electrical contact pads.

### Claim 5 (depends on 4)

The substrate structure of claim 4, wherein the separation distance is greater than 20 μm.

### Claim 6 (depends on 1)

The substrate structure of claim 1, wherein a shape of each of the plurality of insulating blocks is a circle.

### Claim 7 (depends on 6)

The substrate structure of claim 6, wherein the circle has a diameter of greater than 100 μm.

### Claim 8 (depends on 1)

The substrate structure of claim 1, further comprising an insulating protective layer, formed on the surface of the substrate body and having at least one opening corresponding to the chip placement area and exposing a portion of the circuit layer.

### Claim 9 (depends on 8)

The substrate structure of claim 8, wherein the plurality of insulating blocks are disposed in the opening in the chip placement area and are spaced apart from the insulating protective layer.

### Claim 10 (depends on 8)

The substrate structure of claim 8, wherein a portion of the opening is located within the chip placement area, and the remaining portion thereof is located outside the chip placement area.