Resistive random access memory device with improved bottom electrode

A method of manufacturing a memory device, comprising:

• forming a stop layer over a first dielectric layer;
• forming a first via and a second via extending through the stop layer and the first dielectric layer;
• patterning a hard mask structure on the stop layer between the first via and the second via, the hard mask structure having opposing sidewalls;
• depositing a conductive electrode layer over the hard mask structure and the stop layer;
• etching the conductive electrode layer to remove horizontal portions thereof, thereby forming a first tapered bottom electrode on a first one of the opposing sidewalls and a second tapered bottom electrode on a second one of the opposing sidewalls;
• depositing a switching layer over the first tapered bottom electrode, the second tapered bottom electrode, and the hard mask structure;
• and
• forming a top electrode over the switching layer.

A method of forming a resistive switching device, comprising:

• forming a pair of bottom electrode vias in a dielectric stack;
• forming a dielectric hard mask on the dielectric stack bridging the pair of bottom electrode vias;
• forming a first bottom electrode and a second bottom electrode on opposing vertical surfaces of the dielectric hard mask, such that the first bottom electrode contacts the first bottom electrode via and the second bottom electrode contacts the second bottom electrode via;
• depositing a switching material over the first bottom electrode, the second bottom electrode, and the dielectric hard mask;
• depositing a top dielectric layer over the switching material;
• etching an opening in the top dielectric layer vertically aligned with the dielectric hard mask;
• and
• filling the opening with a conductive material to form a top electrode.