Generating and executing test cases for core performance verification
AssigneeInternational Business Machines Corporation
InventorsGandhi Sodabathula, Jang-Soo Lee, David Lee
Life of this patent
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AssigneeInternational Business Machines Corporation
InventorsGandhi Sodabathula, Jang-Soo Lee, David Lee
Estimating the term…
According to a present invention embodiment, a trace collected during flow of instructions through an execution pipeline of one or more processors is received. The trace includes contents of registers and memory. One or more memory locations to be reset are determined from the trace based on performance of the instructions indicated within the trace. The test case is generated including indications of the one or more memory locations to be reset and corresponding contents for resetting the one or more memory locations. The test case is executed on one or more platforms a plurality of times to determine a performance measurement. The one or more memory locations are reset with the corresponding contents between executions of the test case on the one or more platforms.
A method of generating and executing a test case for performance verification of a computing system comprising:
A computer system for generating and executing a test case for performance verification of a computing system comprising:
A computer program product for generating and executing a test case for performance verification of a computing system, the computer program product comprising one or more computer readable storage media having program instructions collectively stored on the one or more computer readable storage media, the program instructions executable by at least one processor to cause the at least one processor to:
Dependencies are inferred from the claim text.