Performing Error Detection in a Processing Cycle
AssigneeGoogle Inc.
InventorMenachem Adelman
Life of this patent
Estimating the term…
Abstract
Aspects of the disclosure are directed to an error detection approach performed in a processing cycle with improved accuracy and reduced latency. The approach involves determining whether the size of a received input value is greater than, equal to, or less than the size of an accumulator value and performing error detection accordingly using parallel lookup tables corresponding to portions of the input value. To avoid bit reversals in the error detection approach, results stored in the lookup tables may be stored in a bit reversed order. For input values that are less than the size of an accumulator value, the accumulator value is split into two portions to increase accuracy of the error detection result.
Claims20
A method for error detection comprising:
- receiving, by the one or more processors, an input value;
- determining, by the one or more processors, that a size of the input value is less than a size of the accumulator value;
- partitioning, by the one or more processors, the accumulator value into a first portion corresponding to the input value and a second portion corresponding to a remainder of the accumulator value;
- performing, by the one or more processors, a XOR operation on the input value and the first portion to generate an input XOR accumulator value;
- generating, by the one or more processors, a plurality of partial results from the input XOR accumulator value using a plurality of lookup tables;
- performing, by the one or more processors, XOR operations on pairs of the plurality of partial results until generating a subsequent partial result;
- and
- performing, by the one or more processors, a XOR operation on the subsequent partial result and the second portion to generate a final result to indicate whether there is an error in the input value.
A system comprising:
- one or more processors;
- and
- one or more storage devices coupled to the one or more processors and storing instructions that, when executed by the one or more processors, cause the one or more processors to perform operations for error detection, the operations comprising:
- receiving an input value;
- determining that a size of the input value is less than a size of the accumulator value;
- partitioning the accumulator value into a first portion corresponding to the input value and a second portion corresponding to a remainder of the accumulator value;
- performing a XOR operation on the input value and the first portion to generate an input XOR accumulator value;
- generating a plurality of partial results from the input XOR accumulator value using a plurality of lookup tables;
- performing XOR operations on pairs of the plurality of partial results until generating a subsequent partial result;
- and
- performing a XOR operation on the subsequent partial result and the second portion to generate a final result to indicate whether there is an error in the input value.
A non-transitory computer readable medium for storing instructions that, when executed by one or more processors, cause the one or more processors to perform operations for error detection, the operations comprising:
- receiving an input value;
- determining that a size of the input value is less than a size of the accumulator value;
- partitioning the accumulator value into a first portion corresponding to the input value and a second portion corresponding to a remainder of the accumulator value;
- performing a XOR operation on the input value and the first portion to generate an input XOR accumulator value;
- generating a plurality of partial results from the input XOR accumulator value using a plurality of lookup tables;
- performing XOR operations on pairs of the plurality of partial results until generating a subsequent partial result;
- and
- performing a XOR operation on the subsequent partial result and the second portion to generate a final result to indicate whether there is an error in the input value.
Dependencies are inferred from the claim text.