Method for manufacturing semiconductor stack structure with ultra thin die

A method for manufacturing a semiconductor stack structure with ultra thin die, comprising:

• manufacturing a plurality of semiconductor wafers, wherein the manufacturing of each of the semiconductor wafers comprises:
• providing a semiconductor substrate having an active surface and a back surface opposite to each other;
• forming a stop layer structure in the semiconductor substrate to divide the semiconductor substrate into a first substrate part and a second substrate part, wherein the first substrate part is located between the stop layer structure and the active surface, the second substrate part is located between the stop layer structure and the back surface, the stop layer structure comprises at least a dielectric stop layer, and the manufacturing of the dielectric stop layer comprises performing an ion implantation process at a depth of the semiconductor substrate and then performing a high-temperature treatment process such that the dielectric stop layer is formed in an area implanted by the ion implantation process;
• sequentially forming an epitaxial layer and an active layer on the active surface, and forming a plurality of conductive structures passing through the active layer, the epitaxial layer and the first substrate part, the conductive structures being connected to the dielectric stop layer;
• forming a redistribution layer on the active layer, the redistribution layer being electrically connected to the conductive structures;
• and
• arranging a first bonding layer on the redistribution layer;
• providing a carrier board, and forming a second bonding layer on the carrier board;
• selecting one of the semiconductor wafers as a first semiconductor wafer, and flipping the first semiconductor wafer such that the first bonding layer of the first semiconductor wafer and the second bonding layer are bonded together;
• removing the second substrate part and part of the stop layer structure to expose the dielectric stop layer and the conductive structures of the first semiconductor wafer;
• forming a first bonding dielectric layer on the dielectric stop layer and the conductive structures of the first semiconductor wafer, a plurality of first conductive blocks passing through the first bonding dielectric layer, and the first conductive blocks being respectively electrically connected to the conductive structures;
• selecting another one of the semiconductor wafers as a second semiconductor wafer, and arranging a plurality of conductive pillars on the first bonding layer of the second semiconductor wafer, the conductive pillars being electrically connected to the redistribution layer;
• performing die sawing on the second semiconductor wafer formed with the conductive pillars as a first batch of dies and a second batch of dies to be stacked;
• flipping the first batch of dies such that the first bonding layer of the first batch of dies is opposite to and is bonded to the first bonding dielectric layer by using hybrid bonding technology, wherein the first conductive blocks of the first bonding dielectric layer respectively correspond to and are electrically connected to the conductive pillars of the first batch of dies;
• forming a first encapsulant on the first bonding dielectric layer of the first semiconductor wafer to cover the first batch of dies and fill between the first batch of dies;
• and
• removing part of the first encapsulant, and removing the second substrate part and part of the stop layer structure of the first batch of dies to expose the dielectric stop layer and the conductive structures of the first batch of dies.

A method for manufacturing a semiconductor stack structure with ultra thin die, comprising:

• manufacturing a plurality of semiconductor wafers, wherein the manufacturing of each of the semiconductor wafers comprises:
• providing a semiconductor substrate having an active surface and a back surface opposite to each other;
• forming a stop layer structure in the semiconductor substrate to divide the semiconductor substrate into a first substrate part and a second substrate part, wherein the first substrate part is located between the stop layer structure and the active surface, the second substrate part is located between the stop layer structure and the back surface, the stop layer structure comprises at least a dielectric stop layer, and the manufacturing of the dielectric stop layer comprises performing an ion implantation process at a depth of the semiconductor substrate and then performing a high-temperature treatment process such that the dielectric stop layer is formed in an area implanted by the ion implantation process;
• sequentially forming an epitaxial layer and an active layer on the active surface, and forming a plurality of conductive structures passing through the active layer, the epitaxial layer and the first substrate part, the conductive structures being connected to the dielectric stop layer;
• forming a redistribution layer on the active layer, the redistribution layer being electrically connected to the conductive structures;
• and
• arranging a first bonding layer on the redistribution layer;
• providing a carrier board, and forming a second bonding layer on the carrier board;
• selecting one of the semiconductor wafers as a first semiconductor wafer, and flipping the first semiconductor wafer such that the first bonding layer of the first semiconductor wafer and the second bonding layer are bonded together;
• removing the second substrate part and the stop layer structure of the first semiconductor wafer to expose the first substrate part and the conductive structures of the first semiconductor wafer, wherein the conductive structures protrude from the first substrate part;
• forming a first bonding dielectric layer on the first substrate part and the conductive structures of the first semiconductor wafer;
• thinning the first bonding dielectric layer to expose the conductive structures of the first semiconductor wafer from a surface of the first bonding dielectric layer;
• selecting another one of the semiconductor wafers as a second semiconductor wafer, and arranging a plurality of conductive pillars on the first bonding layer of the second semiconductor wafer, the conductive pillars being electrically connected to the redistribution layer;
• performing die sawing on the second semiconductor wafer formed with the conductive pillars as a first batch of dies and a second batch of dies to be stacked;
• flipping the first batch of dies such that the first bonding layer of the first batch of dies is opposite to and is bonded to the first bonding dielectric layer by using hybrid bonding technology, wherein the conductive structures exposed from the surface of the first bonding dielectric layer respectively correspond to and are electrically connected to the conductive pillars of the first batch of dies;
• forming a first encapsulant on the first bonding dielectric layer to cover the first batch of dies and fill between the first batch of dies;
• and
• removing part of the first encapsulant, and removing the second substrate part and the stop layer structure of the first batch of dies to expose the first substrate part and the conductive structures of the conductive structure, wherein the conductive structures protrude from the first substrate part;
• forming a second bonding dielectric layer on the first substrate part and the conductive structures of the first batch of dies;
• and
• thinning the second bonding dielectric layer to expose the conductive structures of the first batch of dies from a surface of the second bonding dielectric layer.