Signal conversion device and bit error rate test method

A signal conversion device, comprising:

• an analog-to-digital converter circuit configured to sample an input signal according to a symmetric signal to generate a plurality of output digital codes;
• a plurality of register circuits comprising a first register circuit and a second register circuit;
• and
• at least one control circuit configured to:
• identify a starting digital code in the plurality of output digital codes;
• store the starting digital code and a plurality of first digital codes, which follow the starting digital code in the plurality of output digital codes, into the first register circuit in a first order as a plurality of second digital codes, wherein the starting digital code and the plurality of first digital codes correspond to one cycle of the symmetric signal;
• store the starting digital code and the plurality of first digital codes into the second register circuit in a second order, wherein the second order is opposite to the first order;
• shift the starting digital code and the plurality of first digital codes in the second register circuit to generate a plurality of third digital codes;
• and
• determine a bit error rate of the analog-to-digital converter circuit according to a difference between a corresponding one of the plurality of second digital codes and a corresponding one of the plurality of third digital codes.