# US 2026/0100704 A1 · Electronic device for overvoltage protection

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- Number: US 2026/0100704 A1
- Document ID: US20260100704A1
- Status: Published application
- Kind: A1
- Application number: 19/415,164
- Filed: 2025-12-10
- Published: 2026-04-09
- Earliest claimed: 2022-08-25
- Assignees: Samsung Electronics Co., Ltd.
- Applicants: Samsung Electronics Co., Ltd.
- Inventors: Hyoungjoong KIM; Cheolmin AHN; Myeong-Cheol KIM; Woongki MIN; Sangho KIM; Soomin LEE
- Web page: https://patentgrep.com/patent/US20260100704A1

## CPC

- H03K 19/00315: {in field-effect transistor circuits}
- H02H 9/046: {responsive to excess voltage appearing at terminals of integrated circuits}
- H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M)
- H02H: EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS (indicating or signalling undesired working conditions G01R, e.g. G01R31/00, G08B; locating faults along lines G01R31/08; emergency protective devices H01H)

## Abstract

A electronic device includes a transceiver including a transmitter and a receiver that operate based on a power source voltage and a pad voltage applied from a pad; and an overvoltage protection circuit to apply a first protection voltage to the transmitter and a second protection voltage to the receiver. The overvoltage protection circuit includes: a reference voltage generator to generate a reference voltage when the power source voltage is in an on state; and a voltage detector to set the first protection voltage and the second protection voltage based on the reference voltage when the power source voltage is in an on state, and set the first protection voltage and the second protection voltage based on the pad voltage when the power source voltage is in an off state.

## Claims

### Claim at position 1

1-14. (canceled)

### Claim 15

An overvoltage protection circuit for applying a protection voltage to a receiver operating based on a power source voltage and a pad voltage applied from a pad,
the overvoltage protection circuit comprising:
a reference voltage generator configured to generate a reference voltage when the power source voltage is in an on state; and
a voltage detector configured to generate and apply the protection voltage to the receiver based on the reference voltage when the power source voltage is in the on state, and generate and apply the protection voltage to the receiver based on the pad voltage when the power source voltage is in an off state.

### Claim 16 (depends on 15)

The overvoltage protection circuit of claim 15, wherein the voltage detector comprises:
a protection resistor connected to the pad;
a first n-channel metal-oxide semiconductor (NMOS) transistor having a gate terminal connected to the protection resistor;
a second NMOS transistor having a gate terminal connected to the first NMOS transistor;
a first p-channel metal-oxide semiconductor (PMOS) transistor having a gate terminal to which the reference voltage is applied and a source terminal connected to the second NMOS transistor;
a second PMOS transistor having a gate terminal to which the reference voltage is applied and a source terminal connected to the first PMOS transistor;
a third NMOS transistor having a gate terminal connected to the second PMOS transistor; and
a fourth NMOS transistor having a gate terminal to which the power source voltage is applied and a source terminal to which the reference voltage is applied, and
wherein a body terminal of the first PMOS transistor and the source terminal of the second PMOS transistor are connected to the receiver.

### Claim 17 (depends on 16)

The overvoltage protection circuit of claim 16, wherein a voltage level of the protection voltage is adjusted according to the number of stacks of the first NMOS transistor to the third NMOS transistor.

### Claim 18 (depends on 16)

The overvoltage protection circuit of claim 16, wherein, when the power source voltage is in the off state, the fourth NMOS transistor is turned off, and a voltage divided from the pad voltage is applied to the receiver as the protection voltage, and
when the power source voltage is in the on state, the fourth NMOS transistor is turned on, and the body terminal of the first PMOS transistor and the source terminal of the second PMOS have a high impedance.

### Claim 19 (depends on 15)

The overvoltage protection circuit of claim 15, wherein the protection voltage is equal to or less than a difference value between the pad voltage and a limit voltage of the receiver when the power source voltage is in the off state.

### Claim 20

An electronic device comprising:
a receiver configured to operate based on a power source voltage and a pad voltage applied from a pad, the receiver comprising at least one transistor to which the pad voltage is applied; and
an overvoltage protection circuit configured to apply a protection voltage to the receiver,
wherein the overvoltage protection circuit comprises:
a reference voltage generator configured to generate a reference voltage when the power source voltage is in an on state; and
a voltage detector configured to generate and apply the protection voltage to the receiver based on the pad voltage when the power source voltage is in the on state, and generate and apply the protection voltage to the receiver based on the pad voltage when the power source voltage is in an off state.