Switched capacitor equalizer using integrating amplifier

Abstract

The present disclosure relates to a switched capacitor equalizer. The switched capacitor equalizer according to some embodiments of the present disclosure may include a first integrating amplifier that integrates input voltage in response to an odd clock period and outputs first output voltage, a second integrating amplifier that integrates the input voltage in response to an even clock period and outputs second output voltage, a coupling capacitor that delivers the first output voltage to the second integrating amplifier in response to the odd clock period and delivers the second output voltage to the first integrating amplifier in response to the even clock period, and a first transistor that outputs an odd data signal in response to the odd clock period, and a second transistor that outputs an even data signal in response to the even clock period.

Dependencies are inferred from the claim text.