Low-power operational amplifier

An operational amplifier, comprising:

• a main differential pair of n-channel transistors receiving input signals;
• a folded cascode structure coupled to the differential pair of transistors;
• and
• a pair of p-channel nulling transistors, each having a source terminal coupled to a supply voltage and a drain terminal coupled to a drain terminal of a respective transistor of the differential pair of transistors,
• wherein the pair of p-channel nulling transistors receive nulling signals, and
• wherein a tail current of the differential pair of transistors, bias currents in the folded cascode structure, and nulling currents through the pair of p-channel nulling transistors are selected such that a sum of half the tail current and a first bias current equals a sum of a second bias current and the nulling currents, thereby reducing flicker noise and offset of the operational amplifier.

A nulling circuit, comprising:

• a main amplifier including:
• a differential pair of transistors receiving input signals,
• a folded cascode structure coupled to the differential pair of transistors, and
• at least one nulling transistor coupled to the differential pair of transistors;
• a nulling amplifier providing a nulling signal to the at least one nulling transistor;
• and
• a resistor divider coupled between an output of the main amplifier and an input of the nulling amplifier,
• wherein a tail current of the differential pair of transistors, bias currents in the folded cascode structure, and a nulling current through the at least one nulling transistor are selected such that a sum of half the tail current and a first bias current equals a sum of a second bias current and the nulling current, thereby reducing flicker noise and offset of the main amplifier.