# US 2026/0100679 A1 · Amplification circuit and control method thereof

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- Number: US 2026/0100679 A1
- Document ID: US20260100679A1
- Status: Published application
- Kind: A1
- Application number: 18/953,106
- Filed: 2024-11-20
- Published: 2026-04-09
- Earliest claimed: 2024-10-07
- Assignees: RichWave Technology Corp.
- Applicants: RichWave Technology Corp.
- Inventors: Hsuan-Ming Liu
- Web page: https://patentgrep.com/patent/US20260100679A1

## CPC

- H03F 1/26: Modifications of amplifiers to reduce influence of noise generated by amplifying elements
- H03F 1/52: Circuit arrangements for protecting such amplifiers {(monitoring arrangements G01R31/28; increasing reliability in communication systems, e.g. using redundancy H04B1/74)}
- H03F 1/0277: {Selecting one or more amplifiers from a plurality of amplifiers}
- H03F 1/523: {for amplifiers using field-effect devices (H03F1/526 takes precedence)}
- H03F 1/56: Modifications of input or output impedances, not otherwise provided for
- H03F 1/565: {using inductive elements}
- H03F 3/195: in integrated circuits
- H03F 3/21: with semiconductor devices only {(H03F3/245 takes precedence)}
- H03F 3/72: Gated amplifiers, i.e. amplifiers which are rendered operative or inoperative by means of a control signal
- H03F 2200/222: A circuit being added at the input of an amplifier to adapt the input impedance of the amplifier
- H03F 2200/294: the amplifier being a low noise amplifier [LNA]
- H03F 2200/318: A matching circuit being used as coupling element between two amplifying stages
- H03F 2200/387: A circuit being added at the output of an amplifier to adapt the output impedance of the amplifier
- H03F 2200/411: the output amplifying stage of an amplifier comprising two power stages
- H03F 2200/426: the amplifier comprising circuitry for protection against overload
- H03F 2200/441: Protection of an amplifier being implemented by clamping means
- H03F 2200/444: Diode used as protection means in an amplifier, e.g. as a limiter or as a switch
- H03F 2200/451: the amplifier being a radio frequency amplifier
- H03F: AMPLIFIERS

## Abstract

An amplification circuit includes an input terminal, an output terminal, a first path circuit and a second path circuit. The input terminal would receive an input signal. The output terminal would output an output signal corresponding to the input signal. The first path circuit includes a co-design circuit, an amplifier circuit, a second matching element, and an electrical overstress circuit. The co-design circuit includes a first matching element. A first terminal of the co-design circuit is coupled to the input terminal. The electrical overstress circuit and the second matching element are coupled to a second terminal of the co-design circuit. The amplifier circuit is coupled between the second terminal of the co-design circuit and the output terminal. The second path circuit is coupled between the input terminal and the output terminal. The co-design circuit provides a first impedance in a first mode and a second impedance in a second mode.

## Claims

### Claim 1

An amplification circuit, comprising:
an input terminal configured to receive an input signal;
an output terminal configured to output an output signal corresponding to the input signal;
a first path circuit comprising:
a co-design circuit comprising:
a first terminal coupled to the input terminal;
a second terminal; and
a first matching element comprising a first terminal coupled to the first terminal of the co-design circuit, and a second terminal coupled to the second terminal of the co-design circuit;
an amplifier circuit configured to amplify the input signal, the amplifier circuit comprising a first terminal coupled to the second terminal of the co-design circuit, and a second terminal coupled to the output terminal;
a second matching element comprising a first terminal coupled to the first terminal of the amplifier circuit, and a second terminal coupled to a reference voltage terminal; and
an electrical overstress circuit comprising a first terminal coupled between the second terminal of the co-design circuit and the first terminal of the amplifier circuit, and a second terminal coupled to the reference voltage terminal, wherein the first terminal of the electrical overstress circuit is coupled between the second terminal of the co-design circuit and the first terminal of the second matching element; and
a second path circuit comprising a first terminal coupled to the input terminal, and a second terminal coupled to the output terminal;
wherein the co-design circuit provides a first impedance in a first mode, and the co-design circuit provides a second impedance in a second mode.

### Claim 2 (depends on 1)

The amplification circuit of claim 1, wherein the first matching element comprises a capacitor, and the second matching element comprises an inductor.

### Claim 3 (depends on 1)

The amplification circuit of claim 1, wherein a signal entering the first path circuit has a first power, and another signal entering the second path circuit has a second power, and the first power is less than the second power.

### Claim 4 (depends on 1)

The amplification circuit of claim 1, wherein the first matching element and the second matching element form a part of an input impedance matching circuit of the amplifier circuit.

### Claim 5 (depends on 1)

The amplification circuit of claim 1, wherein:
the co-design circuit further comprises a third matching element and a first switch,
wherein the third matching element and the first switch are coupled in series between the first terminal and the second terminal of the co-design circuit.

### Claim 6 (depends on 5)

The amplification circuit of claim 5, wherein the third matching element comprises an inductor.

### Claim 7 (depends on 5)

The amplification circuit of claim 5, wherein the co-design circuit further comprises:
a second switch comprising a first terminal coupled to the second terminal of the co-design circuit, and a second terminal coupled to the reference voltage terminal.

### Claim 8 (depends on 7)

The amplification circuit of claim 7, wherein:
when the first path circuit is enabled, in an amplification mode, the first switch is turned off, the second switch is turned off, and the input signal is transmitted through the first path circuit and processed to generate the output signal, wherein in the amplification mode, the co-design circuit is in the second mode.

### Claim 9 (depends on 8)

The amplification circuit of claim 8, wherein:
when the second path circuit is enabled, in a bypass mode or a power amplification mode, the first switch is turned on, the second switch is turned on, and the input signal is transmitted through the second path circuit and processed to generate the output signal, wherein in the bypass mode, the co-design circuit is in the second mode.

### Claim 10 (depends on 1)

The amplification circuit of claim 1, wherein the first impedance is less than the second impedance.

### Claim 11 (depends on 5)

The amplification circuit of claim 5, wherein the co-design circuit further comprises a second switch, and the second switch comprises:
a first terminal coupled to the second terminal of the co-design circuit;
a second terminal coupled to the reference voltage terminal; and
x transistors, each transistor of the x transistors comprising a first terminal and a second terminal, wherein a second terminal of an i-th transistor of the x transistors is coupled to a first terminal of an (i+1)-th transistor of the x transistors, i and x are positive integers, and 0<i<x.

### Claim 12 (depends on 5)

The amplification circuit of claim 5, wherein the electrical overstress circuit further comprises:
a transistor comprising a first terminal coupled to the first terminal of the electrical overstress circuit, a second terminal directly coupled to the reference voltage terminal, and a control terminal coupled to the reference voltage terminal or coupled to the reference voltage terminal through a resistor.

### Claim 13 (depends on 12)

The amplification circuit of claim 12, wherein the co-design circuit further comprises a second switch, and the second switch comprises:
a first terminal coupled to the second terminal of the co-design circuit;
a second terminal coupled to the reference voltage terminal; and
a transistor;
wherein the transistor of the second switch has a first size, the transistor of the electrical overstress circuit has a second size larger than the first size.

### Claim 14 (depends on 13)

The amplification circuit of claim 13, wherein:
the transistor of the electrical overstress circuit and the transistor of the second switch have a same width-to-length ratio;
the transistor of the electrical overstress circuit is formed by p semiconductor components;
the transistor of the second switch is formed by q semiconductor components;
each semiconductor component of the transistor of the electrical overstress circuit is same as each semiconductor component of the transistor of the second switch; and
p and q are integers greater than 0, and p>q.

### Claim 15 (depends on 13)

The amplification circuit of claim 13, wherein:
the second switch comprises x transistors;
each transistor of the x transistors comprises a first terminal and a second terminal;
a second terminal of an i-th transistor of the x transistors is coupled to the first terminal of an (i+1)-th transistor of the x transistors;
i and x are positive integers, and 0<i<x;
the transistor of the electrical overstress circuit comprises y transistors;
each transistor of the y transistors comprises a first terminal and a second terminal;
the second terminal of a j-th transistor of the y transistors is coupled to the first terminal of a (j+1)-th transistor of the y transistors;
j and y are positive integers, 0<j<y, and x>y.

### Claim 16 (depends on 1)

The amplification circuit of claim 1, wherein:
the second path circuit further comprises an attenuation circuit configured to attenuate the input signal; and
the attenuation circuit comprises a first terminal coupled to the first terminal of the second path circuit, and a second terminal coupled to the second terminal of the second path circuit.

### Claim 17 (depends on 1)

The amplification circuit of claim 1, wherein:
the second path circuit further comprises a power amplification circuit configured to amplify the input signal; and
the power amplification circuit comprises a first terminal coupled to the first terminal of the second path circuit, and a second terminal coupled to the second terminal of the second path circuit.

### Claim 18 (depends on 1)

The amplification circuit of claim 1, wherein the electrical overstress circuit further comprises:
a transistor comprising a first terminal coupled to the first terminal of the electrical overstress circuit, a second terminal, and a control terminal;
a diode comprising an anode terminal coupled to the second terminal of the transistor, and a cathode terminal coupled to the reference voltage terminal; and
a resistor comprising a first terminal and a second terminal, wherein a body terminal of the transistor of the electrical overstress circuit is coupled to the reference voltage terminal through the resistor.

### Claim 19 (depends on 1)

The amplification circuit of claim 1, wherein the electrical overstress circuit further comprises:
a first diode string, comprising K diodes, wherein a cathode terminal of a k-th diode of the K diodes is coupled to an anode terminal of a (k+1)-th diode of the K diodes, an anode terminal of a first diode of the K diodes is coupled to the first terminal of the electrical overstress circuit, and a cathode terminal of a K-th diode of the K diodes is coupled to the second terminal of the electrical overstress circuit, K and k are integers, 1≤k≤(K−1); and
a second diode string, comprising R diodes, wherein a cathode terminal of an r-th diode of the R diodes is coupled to an anode terminal of an (r+1)-th diode of the R diodes, an anode terminal of a first diode of the R diodes is coupled to the second terminal of the electrical overstress circuit, and a cathode terminal of an R-th diode of the R diodes is coupled to the first terminal of the electrical overstress circuit;
wherein R and r are integers, 1≤r≤(R−1).

### Claim 20

A control method for an amplification circuit, the amplification circuit comprising an input terminal, an output terminal, a first path circuit and a second path circuit, the first path circuit comprising a co-design circuit, an electrical overstress circuit and an amplifier circuit, the control method comprising:
using the input terminal to receive an input signal;
using the output terminal to output an output signal corresponding to the input signal;
turning off a switch of the co-design circuit to control the amplification circuit to enter an amplification mode to transmit and process the input signal through the co-design circuit to generate the output signal, wherein a matching element of the co-design circuit is used to provide a matching impedance to the amplifier circuit;
turning on the switch of the co-design circuit to control the amplification circuit to enter a bypass mode or a power amplification mode to transmit and process the input signal through the second path circuit to generate the output signal, wherein the matching element of the co-design circuit resonates to provide a high impedance; and
turning on the electrical overstress circuit to control the amplification circuit to enter an electrical overstress mode to transmit a signal to a reference voltage terminal through the co-design circuit.