Back to results
US 2026/0100641 A1Published application
Power factor corrected power supply with small bus capacitor
OwnerFrantz Emmanuel Robinsoninventor
Life of this patent
Estimating the term…
Loading patent…
Loading patent…
OwnerFrantz Emmanuel Robinsoninventor
Estimating the term…
A Power Factor Correction (PFC) circuit that includes an unusually low value output bus capacitor is disclosed. In an embodiment, the PFC circuit includes a rectifier bridge circuit, a PFC power stage, a PFC control segment, and the small value, high-voltage capacitor. In some embodiments, the PFC control segment includes a PFC controller and a digital signal processor (DSP), and the DSP is configured to convert an high AC ripple feedback signal received from the high-voltage feedback divider to a digital high ripple feedback digital signal, transform the digital high ripple feedback digital signal to a suitable low-ripple feedback signal, convert the digital low-ripple feedback signal to an AC low-ripple feedback signal, and input the analog low-ripple feedback signal to the PFC control segment enabling the PFC circuit to operate correctly and reliably even though use of the low value output bus capacitor results in the presence of a very high AC ripple on the output voltage.
A Power Factor Correction (PFC) circuit, comprising:
A method for operating a Power Factor Correction (PFC) device having a small value output capacitor, comprising:
A non-transitory computer-readable medium storing instructions which when executed by a digital signal processor (DSP) of a Power Factor Correction (PFC) device that utilizes a small value output capacitor, causes the DSP to:
Dependencies are inferred from the claim text.