Lateral electrostatic discharge device with nanosheet gates
AssigneeInternational Business Machines Corporation
InventorsRobert Gauthier, Anindya Nath, Masoud Zabihi, Anthony I-Chih Chou
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Abstract
A semiconductor device includes a guardring including a first doped region and a first contact over the first doped region, a base including a second doped region and a second contact over the second doped region, a collector including a third doped region and a third contact over the third doped region, and an emitter including a fourth doped region and a fourth contact over the fourth doped region. The emitter, the collector, the base, and the guardring are separated on a backside of the semiconductor device via shallow trench isolation (STI) or floating gates.
Claims20
A semiconductor device, comprising:
- a guardring comprising a first doped region and a first contact over the first doped region;
- a base comprising a second doped region and a second contact over the second doped region;
- a collector comprising a third doped region and a third contact over the third doped region;
- and
- an emitter comprising a fourth doped region and a fourth contact over the fourth doped region,
- wherein the emitter, the collector, the base, and the guardring are separated on a backside of the semiconductor device via shallow trench isolation (STI) or floating gates.
A method of fabricating a semiconductor device, the method comprising:
- forming a guardring comprising a first doped region and a first contact over the first doped region;
- forming a base comprising a second doped region and a second contact over the second doped region;
- forming a collector comprising a third doped region and a third contact over the third doped region;
- forming an emitter comprising a fourth doped region and a fourth contact over the fourth doped region;
- and
- separating the emitter, the collector, the base, and the guardring on a backside of the semiconductor device via shallow trench isolation (STI) or floating gates.
A semiconductor device, comprising:
- a guardring comprising a first doped region and a first contact over the first doped region;
- a base comprising a second doped region and a second contact over the second doped region;
- a collector comprising a third doped region and a third contact over the third doped region;
- and
- an emitter comprising a fourth doped region and a fourth contact over the fourth doped region, wherein:
- the collector, the base, and the guardring are separated on a backside of the semiconductor device via shallow trench isolation (STI), and
- the emitter and the collector are separated on the backside of the semiconductor device via floating gates.
Dependencies are inferred from the claim text.