# US 2026/0095271 A1 · Monitoring and Selecting a Stable and Best PTP Master in a Packet Network > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2026/0095271 A1 - Document ID: US20260095271A1 - Status: Published application - Kind: A1 - Application number: 18/944,090 - Filed: 2024-11-12 - Published: 2026-04-02 - Earliest claimed: 2024-09-30 - Assignees: Ciena Corporation - Applicants: Ciena Corporation - Inventors: Ankur Saxena; Sharad Kumar Srivastava - Web page: https://patentgrep.com/patent/US20260095271A1 ## CPC - H04J 3/0667: {Bidirectional timestamps, e.g. NTP or PTP for compensation of clock drift and for compensation of propagation delays (arrangements for monitoring round trip delays in packet switching networks H04L43/0864)} - H04J 3/0641: {Change of the master or reference, e.g. take-over or failure of the master} - H04J 3/0644: {External master-clock} - H04J 3/14: Monitoring arrangements {(for SDH/SONET rings H04J3/085)} - H04L 41/0668: by dynamic selection of recovery network elements, e.g. replacement by the most appropriate element after failure - H04J: MULTIPLEX COMMUNICATION (transmission in general H04B; peculiar to transmission of digital information H04L5/00; systems for the simultaneous or sequential transmission of more than one television signal H04N7/08; in exchanges H04Q11/00; stereophonic systems H04S) - H04L: TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION (arrangements common to telegraphic and telephonic communication H04M) ## Abstract A network element in a packet network includes circuitry configured to communicate with a master clock for Precision Time Protocol (PTP), monitor one or more of link stability to the master clock, errors in packets to the master clock, and clock class stability of the master clock; and perform a Best Master Clock Algorithm (BMCA) based on the monitored one or more of the link stability, the errors, and the clock class stability. The BMCA is further performed based on one or more of loss of synchronization messages, loss of announce messages, loss of follow up messages, unusable timing information, and a holdover mode. ## Claims ### Claim 1 A network element in a packet network, the network element comprising circuitry configured to: communicate with a master clock for Precision Time Protocol (PTP), monitor one or more of link stability to the master clock, errors in packets to the master clock, and clock class stability of the master clock, and perform a Best Master Clock Algorithm (BMCA) based on the monitored one or more of the link stability, the errors, and the clock class stability. ### Claim 2 (depends on 1) The network element of claim 1, wherein the BMCA is further performed based on one or more of loss of synchronization messages, loss of announce messages, loss of follow up messages, unusable timing information, and a holdover mode. ### Claim 3 (depends on 1) The network element of claim 1, wherein the monitored one or more of the link stability, the errors, and the clock class stability are each a PTP Telecom Synchronization Fail (PTSF) alarm. ### Claim 4 (depends on 1) The network element of claim 1, wherein the BMCA is performed responsive to an alarm for the monitored one or more of the link stability, the errors, and the clock class stability. ### Claim 5 (depends on 1) The network element of claim 1, wherein the BMCA is performed based on the link stability where an alarm is raised when a quality issue of a link to the master clock is detected, and where the alarm is removed after a wait to restore time where the quality issue is not detected during the wait to restore time. ### Claim 6 (depends on 5) The network element of claim 5, wherein the quality issue is based on any of packet loss, latency, jitter, and throughput consistency. ### Claim 7 (depends on 1) The network element of claim 1, wherein the BMCA is performed based on the errors which are Cyclic Redundancy Check (CRC) where an alarm is raised when a certain number of CRC errors are detected on a link to the master clock, and where the alarm is removed after a wait to restore time where the CRC errors not detected during the wait to restore time. ### Claim 8 (depends on 1) The network element of claim 1, wherein the BMCA is performed based on the clock class stability where an alarm is raised when a certain number of clock class flops are detected on the master clock, and where the alarm is removed after a wait to restore time where the clock class flops are not detected during the wait to restore time. ### Claim 9 A method implemented in a packet network, the method comprising steps of: communicating with a master clock for Precision Time Protocol (PTP); monitoring one or more of link stability to the master clock, errors in packets to the master clock, and clock class stability of the master clock; and performing a Best Master Clock Algorithm (BMCA) based on the monitored one or more of the link stability, the errors, and the clock class stability. ### Claim 10 (depends on 9) The method of claim 9, wherein the BMCA is further performed based on one or more of loss of synchronization messages, loss of announce messages, loss of follow up messages, unusable timing information, and a holdover mode. ### Claim 11 (depends on 9) The method of claim 9, wherein the monitored one or more of the link stability, the errors, and the clock class stability are each a PTP Telecom Synchronization Fail (PTSF) alarm. ### Claim 12 (depends on 9) The method of claim 9, wherein the BMCA is performed responsive to an alarm for the monitored one or more of the link stability, the errors, and the clock class stability. ### Claim 13 (depends on 9) The method of claim 9, wherein the BMCA is performed based on the link stability where an alarm is raised when a quality issue of a link to the master clock is detected, and where the alarm is removed after a wait to restore time where the quality issue is not detected during the wait to restore time. ### Claim 14 (depends on 13) The method of claim 13, wherein the quality issue is based on any of packet loss, latency, jitter, and throughput consistency. ### Claim 15 (depends on 9) The method of claim 9, wherein the BMCA is performed based on the errors which are Cyclic Redundancy Check (CRC) where an alarm is raised when a certain number of CRC errors are detected on a link to the master clock, and where the alarm is removed after a wait to restore time where the CRC errors not detected during the wait to restore time. ### Claim 16 (depends on 9) The method of claim 9, wherein the BMCA is performed based on the clock class stability where an alarm is raised when a certain number of clock class flops are detected on the master clock, and where the alarm is removed after a wait to restore time where the clock class flops are not detected during the wait to restore time. ### Claim 17 A non-transitory computer-readable medium comprising instructions that, when executed, cause circuitry to perform steps of: communicating with a master clock for Precision Time Protocol (PTP); monitoring one or more of link stability to the master clock, errors in packets to the master clock, and clock class stability of the master clock; and performing a Best Master Clock Algorithm (BMCA) based on the monitored one or more of the link stability, the errors, and the clock class stability. ### Claim 18 (depends on 17) The non-transitory computer-readable medium element of claim 17, wherein the BMCA is further performed based on one or more of loss of synchronization messages, loss of announce messages, loss of follow up messages, unusable timing information, and a holdover mode. ### Claim 19 (depends on 17) The non-transitory computer-readable medium of claim 17, wherein the monitored one or more of the link stability, the errors, and the clock class stability are each a PTP Telecom Synchronization Fail (PTSF) alarm. ### Claim 20 (depends on 17) The non-transitory computer-readable medium of claim 17, wherein the BMCA is performed responsive to an alarm for the monitored one or more of the link stability, the errors, and the clock class stability.