Digital injection-locked oscillator

Digital injection-locked oscillator comprising:

• an adder configured to add a first digital word over N bits with a second digital word over N bits and to output a result of the addition in the form of a third digital word over N bits, with N an integer greater than 1;
• a register configured to update the second digital word based on the third digital word at each period of a clock signal;
• a first circuit configured to:
• receive a reference signal at a reference frequency equal to a natural frequency of an output bit of the oscillator, and a reference increment, inc_ref,
• calculate a first value selectively equal to the reference increment inc_ref and to minus the reference increment inc_ref as a function of at least one binary state of the reference signal, and
• output the first digital word determined at least partly by adding the first value and a positive control number, P, of the oscillator, the output bit being a bit of the second word.