Non-adjacent connection of high-bandwidth memory chiplets, i/o chiplets, and compute chiplets through embedded logic bridges

Abstract

A system of high bandwidth memory (HBM) chiplets and compute chiplets includes embedded logic bridges that extend communication distances from the HBM chiplets to other chiplets beyond the ˜6 mm limit imposed by the JEDEC standard. The embedded logic bridges include high-speed (e.g., greater than 1 Gbps) communication circuits that drive communication signals longer distances without fading below the detection threshold of the receiver. The longer high-speed communication distances enable more HBM chiplets to connect to a compute chiplet (and other chiplets, such as I/O or other compute chiplets) to support computational workloads in high-performance computing and machine learning/artificial intelligence, which depend on access to large amounts of memory for efficient operations.

Dependencies are inferred from the claim text.