Providing adaptive and dynamic redundancy for functional safety in processor devices

A processor device, comprising:

• means for receiving redundancy mapping data for each safety-critical block circuit of a plurality of safety-critical block circuits of the processor device;
• means for receiving an indication of one or more active block circuits among the plurality of safety-critical block circuits;
• means for configuring one or more configurable redundancy logic block (CRLB) clusters of a plurality of CRLB clusters to duplicate functionality of the respective one or more active block circuits, based on the redundancy mapping data corresponding to the one or more active block circuits;
• and
• means for executing the one or more active block circuits with the one or more CRLB clusters as redundancy.

A method for providing adaptive and dynamic redundancy for functional safety, comprising:

• receiving, by a central configurable redundancy logic block (CRLB) controller circuit of a processor device, redundancy mapping data for each safety-critical block circuit of a plurality of safety-critical block circuits of the processor device;
• receiving, by the central CRLB controller circuit, an indication of one or more active block circuits among the plurality of safety-critical block circuits;
• transmitting, by the central CRLB controller circuit, the redundancy mapping data corresponding to the one or more active block circuits to a redundancy map matrix switch circuit of the processor device;
• configuring, by the redundancy map matrix switch circuit, one or more CRLB clusters of a plurality of CRLB clusters of the processor device to duplicate functionality of the respective one or more active block circuits, based on the redundancy mapping data;
• and
• providing, by the redundancy map matrix switch circuit, logic redundancy for the one or more active block circuits using the one or more CRLB clusters.

A non-transitory computer-readable medium, having stored thereon computer-executable instructions that, when executed by a processor device, causes the processor device to:

• receive redundancy mapping data for each safety-critical block circuit of a plurality of safety-critical block circuits of the processor device;
• receive an indication of one or more active block circuits among the plurality of safety-critical block circuits;
• transmit the redundancy mapping data corresponding to the one or more active block circuits to a redundancy map matrix switch circuit of the processor device;
• configure one or more configurable redundancy logic block (CRLB) clusters of a plurality of CRLB clusters of the processor device to duplicate functionality of the respective one or more active block circuits, based on the redundancy mapping data;
• and
• provide logic redundancy for the one or more active block circuits using the one or more CRLB clusters.