Functionally safe processor system
AssigneeQUALCOMM Incorporated
InventorsVijay Kiran KALYANAM, Vicente Enrique CHUNG, Amit ANEJA, Stephen SHANNON, Suresh Kumar VENKUMAHANTI
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AssigneeQUALCOMM Incorporated
InventorsVijay Kiran KALYANAM, Vicente Enrique CHUNG, Amit ANEJA, Stephen SHANNON, Suresh Kumar VENKUMAHANTI
Estimating the term…
Aspects of the disclosure are directed to functional safety (FUSA) via performance monitoring and logic, memory error detection and protection monitoring. In accordance with one aspect, the disclosure includes incrementing each of a plurality of functional safety (FUSA) monitoring counters upon detection of a functional safety (FUSA) event, wherein the plurality of FUSA monitoring counters is part of a hardware-based monitoring system; comparing the plurality of FUSA monitoring counters to a plurality of functional safety (FUSA) counter thresholds using a push methodology; generating at least one interrupt signal and sending the at least one interrupt signal to a FUSA control module if at least one of the plurality of FUSA monitoring counters exceeds at least one of the plurality of FUSA counter thresholds; and executing a state transition to a functional safety (FUSA) safe state using the push methodology based on the at least one interrupt signal.
An apparatus comprising:
A method comprising:
An apparatus comprising:
Dependencies are inferred from the claim text.