# US 2026/0089840 A1 · Circuit board and fabricating method of the same > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2026/0089840 A1 - Document ID: US20260089840A1 - Status: Published application - Kind: A1 - Application number: 18/896,007 - Filed: 2024-09-25 - Published: 2026-03-26 - Earliest claimed: 2024-09-25 - Assignees: Avary Holding (Shenzhen) Co., Limited.; HongHengShen Electronical Technology(Huai’an)Co., Ltd.; Garuda Technology Co., Ltd. - Applicants: Avary Holding (Shenzhen) Co., Ltd.; HongHengShen Electronical Technology(Huai’an)Co., Ltd.; Garuda Technology Co., Ltd. - Inventors: Ping LI; Ming-Jun CHEN; Yu-Feng DAI; Wen-Qian LIN - Web page: https://patentgrep.com/patent/US20260089840A1 ## CPC - H05K 1/115: {Via connections; Lands around holes or via connections (H05K1/112 takes precedence)} - H05K 1/0298: {Multilayer circuits} - H05K 3/107: {by filling grooves in the support with conductive material (H05K3/045, H05K3/101, H05K3/1258 and H05K3/465 take precedence)} - H05K 3/429: {Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers} - H05K 3/4602: {characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated} - H05K 2201/09509: Blind vias, i.e. vias having one side closed - H05K 2203/107: Using laser light - H05K: PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS ## Abstract A circuit board and a fabricating method of the same are provided. The circuit board includes multiple first wiring layers, a plated through hole, a filling material, a cover wiring layer, a second wiring layer and a conductive structure. The plated through hole extends through the first wiring layers and is electrically connected to the first wiring layers. The filling material is disposed in the plated through hole. The cover wiring layer covers the plated through hole and is electrically connected to the plated through hole. The second wiring layer is stacked on the first wiring layers and the cover wiring layer. The conductive structure extends through the cover wiring layer to the filling material from the second wiring layer and is inserted in the filling material. The conductive structure does not penetrate the filling material. ## Claims ### Claim 1 A circuit board, comprising: multiple first wiring layers that are stacked; a plated through hole that extends through the multiple first wiring layers and is electrically connected to the multiple first wiring layers; a filling material that is disposed in the plated through hole; a cover wiring layer that covers the plated through hole and is electrically connected to the plated through hole; a second wiring layer that is stacked on the multiple first wiring layers and the cover wiring layer; and a conductive structure that extends through the cover wiring layer to the filling material from the second wiring layer and is inserted in the filling material, wherein the conductive structure is electrically connected to the second wiring layer and the cover wiring layer and does not penetrate the filling material. ### Claim 2 (depends on 1) The circuit board according to claim 1, wherein a width of the conductive structure is gradually reduced in a direction away from the second wiring layer. ### Claim 3 (depends on 1) The circuit board according to claim 1, wherein the conductive structure has a first width at a position corresponding to the second wiring layer and a second width at a position corresponding to the cover wiring layer; and a ratio of the second width to the first width is 0.8-1. ### Claim 4 (depends on 3) The circuit board according to claim 3, wherein the conductive structure has a bottom extending to the filling material, the bottom has a third width, and a ratio of the third width to the second width is 0.8-1. ### Claim 5 (depends on 1) The circuit board according to claim 1, wherein the conductive structure has a first extension length, wherein the first extension length is a length extending from the second wiring layer to the filling material; the conductive structure has a second extension length, wherein the second extension length is a length extending from the cover wiring layer to the filling material; and a ratio of the second extension length to the first extension length is 1/3-1/2. ### Claim 6 (depends on 1) The circuit board according to claim 1, wherein an aspect ratio of the conductive structure is 0.6-0.9. ### Claim 7 (depends on 1) The circuit board according to claim 1, wherein the conductive structure is a conductive blind via. ### Claim 8 A fabricating method of a circuit board, comprising: providing a baseboard, wherein the baseboard comprises multiple first metal layers, a plated through hole and a filling material, wherein the multiple first metal layers are stacked, the plated through hole extends through the multiple first metal layers and is electrically connected to the multiple first metal layers, and the filling material is disposed in the plated through hole; forming a cover metal layer on the multiple first metal layers; forming a via hole on the cover metal layer to form a cover wiring layer, wherein the via hole reveals the filling material; after the via hole is formed, stacking a second metal layer on the cover wiring layer; after the second metal layer is stacked, forming a groove, wherein the groove extends through the cover wiring layer to part of the filling material from the second metal layer, wherein the groove overlaps the via hole; and forming a conductive structure in the groove, wherein the conductive structure is inserted in the filling material and is electrically connected to the second metal layer and the cover wiring layer. ### Claim 9 (depends on 8) The fabricating method according to claim 8, wherein an aperture of the groove at a position corresponding to the via hole is greater than an aperture of the via hole. ### Claim 10 (depends on 8) The fabricating method according to claim 8, wherein the via hole is formed by an etching process. ### Claim 11 (depends on 8) The fabricating method according to claim 8, wherein the groove is formed by a laser process. ### Claim 12 (depends on 8) The fabricating method according to claim 8, further comprising: before the second metal layer is stacked, patterning the first metal layers to form multiple first wiring layers; and after the second metal layer is stacked, patterning the second metal layer to form a second wiring layer. ### Claim 13 (depends on 12) The fabricating method according to claim 12, wherein the conductive structure has a first width at a position corresponding to the second wiring layer and a second width at a position corresponding to the cover wiring layer; and a ratio of the second width to the first width is 0.8-1. ### Claim 14 (depends on 13) The fabricating method according to claim 13, wherein the conductive structure has a bottom extending to the filling material, the bottom has a third width, and a ratio of the third width to the second width is 0.8-1. ### Claim 15 (depends on 12) The fabricating method according to claim 12, wherein the conductive structure has a first extension length, wherein the first extension length is a length extending from the second wiring layer to the filling material; the conductive structure has a second extension length, wherein the second extension length is a length extending from the cover wiring layer to the filling material; and a ratio of the second extension length to the first extension length is 1/3-1/2. ### Claim 16 (depends on 8) The fabricating method according to claim 8, wherein an aspect ratio of the conductive structure is 0.6-0.9.